diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..5328c2b --- /dev/null +++ b/.gitignore @@ -0,0 +1,12 @@ +*.log +*.jou +*.ini +*.wlf +*.vstf +wlft* +work +transcript +prj +.Xil +wave_values.txt +*.ini diff --git a/src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl b/src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl index 3ce3007..0f95f33 100644 --- a/src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl +++ b/src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl @@ -269,7 +269,7 @@ begin end loop; -- wave_values <= poly_sum; -- wave_values <= ((coeff(2)*real(times**2) + coeff(1)*real(times))/(real(degrees-1))) * real(2**16); -- for smaller test - wave_values <= ((poly_sum)/(real(degrees-1))) * real(2**16); -- out = (f{x'} / (N-1)) * ADC height + wave_values <= ((poly_sum)/(real(degrees-1))) * real(2**16) + offset; -- out = (f{x'} / (N-1)) * ADC height -- wave_values <= SIN(real(times)); -- possible to use sine wave for testing end; @@ -395,15 +395,15 @@ begin degrees <= 3; clk_delay(1); poly_gen(clk, direction, degrees, times + 1, v_coeffs, offset, wave_values_next); - -- clk_delay(5); + clk_delay(1); -- -- construct an array contains random coefficients -- for i in 0 to degrees loop -- uniform(seed1, seed2, x); -- v_coeffs(i) := x; -- end loop; - + offset := wave_values - wave_values_next; -- offset is the difference between the last two values - -- offset := 0; + for i in 2048 to 4095 loop times <= i; poly_gen(clk, direction, degrees, times, v_coeffs, offset, wave_values); diff --git a/tools/sim/modelsim.ini b/tools/sim/modelsim.ini index bd51c12..7e0f5c5 100644 --- a/tools/sim/modelsim.ini +++ b/tools/sim/modelsim.ini @@ -17,446 +17,444 @@ others = $MODEL_TECH/../modelsim.ini ; Verilog Section ; -secureip = E:/xilinx_libs/secureip -unisim = E:/xilinx_libs/unisim -unimacro = E:/xilinx_libs/unimacro -unifast = E:/xilinx_libs/unifast -unisims_ver = E:/xilinx_libs/unisims_ver -unimacro_ver = E:/xilinx_libs/unimacro_ver -unifast_ver = E:/xilinx_libs/unifast_ver -simprims_ver = E:/xilinx_libs/simprims_ver -xpm = E:/xilinx_libs/xpm -xilinx_vip = E:/xilinx_libs/xilinx_vip -adc_dac_if_phy_v1_0_0 = E:/xilinx_libs/adc_dac_if_phy_v1_0_0 -advanced_io_wizard_phy_v1_0_0 = E:/xilinx_libs/advanced_io_wizard_phy_v1_0_0 -advanced_io_wizard_v1_0_7 = E:/xilinx_libs/advanced_io_wizard_v1_0_7 -ahblite_axi_bridge_v3_0_21 = E:/xilinx_libs/ahblite_axi_bridge_v3_0_21 -ai_noc = E:/xilinx_libs/ai_noc -ai_pl_trig = E:/xilinx_libs/ai_pl_trig -ai_pl = E:/xilinx_libs/ai_pl -an_lt_v1_0_6 = E:/xilinx_libs/an_lt_v1_0_6 -audio_clock_recovery_unit_v1_0_2 = E:/xilinx_libs/audio_clock_recovery_unit_v1_0_2 -audio_tpg_v1_0_0 = E:/xilinx_libs/audio_tpg_v1_0_0 -av_pat_gen_v1_0_1 = E:/xilinx_libs/av_pat_gen_v1_0_1 -av_pat_gen_v2_0_0 = E:/xilinx_libs/av_pat_gen_v2_0_0 -axis_cap_ctrl_v1_0_0 = E:/xilinx_libs/axis_cap_ctrl_v1_0_0 -axis_dbg_stub_v1_0_0 = E:/xilinx_libs/axis_dbg_stub_v1_0_0 -axis_dbg_sync_v1_0_0 = E:/xilinx_libs/axis_dbg_sync_v1_0_0 -axis_ila_adv_trig_v1_0_0 = E:/xilinx_libs/axis_ila_adv_trig_v1_0_0 -axis_ila_ct_v1_0_0 = E:/xilinx_libs/axis_ila_ct_v1_0_0 -axis_ila_pp_v1_0_0 = E:/xilinx_libs/axis_ila_pp_v1_0_0 -axis_ila_txns_cntr_v1_0_0 = E:/xilinx_libs/axis_ila_txns_cntr_v1_0_0 -axis_infrastructure_v1_1_0 = E:/xilinx_libs/axis_infrastructure_v1_1_0 -axis_itct_v1_0_0 = E:/xilinx_libs/axis_itct_v1_0_0 -axis_mem_v1_0_0 = E:/xilinx_libs/axis_mem_v1_0_0 -axis_mu_v1_0_0 = E:/xilinx_libs/axis_mu_v1_0_0 -axis_protocol_checker_v2_0_10 = E:/xilinx_libs/axis_protocol_checker_v2_0_10 -axi_ahblite_bridge_v3_0_23 = E:/xilinx_libs/axi_ahblite_bridge_v3_0_23 -axi_amm_bridge_v1_0_16 = E:/xilinx_libs/axi_amm_bridge_v1_0_16 -axi_bram_ctrl_v4_1_6 = E:/xilinx_libs/axi_bram_ctrl_v4_1_6 -axi_chip2chip_v5_0_15 = E:/xilinx_libs/axi_chip2chip_v5_0_15 -axi_dbg_hub = E:/xilinx_libs/axi_dbg_hub -axi_infrastructure_v1_1_0 = E:/xilinx_libs/axi_infrastructure_v1_1_0 -axi_jtag_v1_0_0 = E:/xilinx_libs/axi_jtag_v1_0_0 -axi_lite_ipif_v3_0_4 = E:/xilinx_libs/axi_lite_ipif_v3_0_4 -axi_lmb_bridge_v1_0_0 = E:/xilinx_libs/axi_lmb_bridge_v1_0_0 -axi_pcie3_v3_0_22 = E:/xilinx_libs/axi_pcie3_v3_0_22 -axi_perf_mon_v5_0_28 = E:/xilinx_libs/axi_perf_mon_v5_0_28 -axi_pmon_v1_0_0 = E:/xilinx_libs/axi_pmon_v1_0_0 -axi_remapper_rx_v1_0_0 = E:/xilinx_libs/axi_remapper_rx_v1_0_0 -axi_remapper_tx_v1_0_0 = E:/xilinx_libs/axi_remapper_tx_v1_0_0 -blk_mem_gen_v8_3_6 = E:/xilinx_libs/blk_mem_gen_v8_3_6 -blk_mem_gen_v8_4_5 = E:/xilinx_libs/blk_mem_gen_v8_4_5 -bsip_v1_1_0 = E:/xilinx_libs/bsip_v1_1_0 -bs_mux_v1_0_0 = E:/xilinx_libs/bs_mux_v1_0_0 -cam_v2_3_0 = E:/xilinx_libs/cam_v2_3_0 -clk_gen_sim_v1_0_2 = E:/xilinx_libs/clk_gen_sim_v1_0_2 -clk_vip_v1_0_2 = E:/xilinx_libs/clk_vip_v1_0_2 -cmac_usplus_v3_1_9 = E:/xilinx_libs/cmac_usplus_v3_1_9 -cmac_v2_6_7 = E:/xilinx_libs/cmac_v2_6_7 -compact_gt_v1_0_12 = E:/xilinx_libs/compact_gt_v1_0_12 -cpm4_v1_0_8 = E:/xilinx_libs/cpm4_v1_0_8 -cpm5_v1_0_8 = E:/xilinx_libs/cpm5_v1_0_8 -dcmac_v2_0_0 = E:/xilinx_libs/dcmac_v2_0_0 -ddr4_pl_phy_v1_0_0 = E:/xilinx_libs/ddr4_pl_phy_v1_0_0 -ddr4_pl_v1_0_8 = E:/xilinx_libs/ddr4_pl_v1_0_8 -displayport_v8_1_5 = E:/xilinx_libs/displayport_v8_1_5 -dist_mem_gen_v8_0_13 = E:/xilinx_libs/dist_mem_gen_v8_0_13 -dprx_fec_8b10b_v1_0_1 = E:/xilinx_libs/dprx_fec_8b10b_v1_0_1 -dp_videoaxi4s_bridge_v1_0_1 = E:/xilinx_libs/dp_videoaxi4s_bridge_v1_0_1 -ecc_v2_0_13 = E:/xilinx_libs/ecc_v2_0_13 -emb_fifo_gen_v1_0_2 = E:/xilinx_libs/emb_fifo_gen_v1_0_2 -emb_mem_gen_v1_0_6 = E:/xilinx_libs/emb_mem_gen_v1_0_6 -emc_common_v3_0_5 = E:/xilinx_libs/emc_common_v3_0_5 -ethernet_1_10_25g_v2_7_5 = E:/xilinx_libs/ethernet_1_10_25g_v2_7_5 -fast_adapter_v1_0_3 = E:/xilinx_libs/fast_adapter_v1_0_3 -fifo_generator_v13_0_6 = E:/xilinx_libs/fifo_generator_v13_0_6 -fifo_generator_v13_1_4 = E:/xilinx_libs/fifo_generator_v13_1_4 -fifo_generator_v13_2_7 = E:/xilinx_libs/fifo_generator_v13_2_7 -fit_timer_v2_0_10 = E:/xilinx_libs/fit_timer_v2_0_10 -generic_baseblocks_v2_1_0 = E:/xilinx_libs/generic_baseblocks_v2_1_0 -gigantic_mux = E:/xilinx_libs/gigantic_mux -gig_ethernet_pcs_pma_v16_2_8 = E:/xilinx_libs/gig_ethernet_pcs_pma_v16_2_8 -gmii_to_rgmii_v4_1_4 = E:/xilinx_libs/gmii_to_rgmii_v4_1_4 -gtwizard_ultrascale_v1_5_4 = E:/xilinx_libs/gtwizard_ultrascale_v1_5_4 -gtwizard_ultrascale_v1_6_13 = E:/xilinx_libs/gtwizard_ultrascale_v1_6_13 -gtwizard_ultrascale_v1_7_13 = E:/xilinx_libs/gtwizard_ultrascale_v1_7_13 -hbm2e_pl_v1_0_0 = E:/xilinx_libs/hbm2e_pl_v1_0_0 -hbm_v1_0_12 = E:/xilinx_libs/hbm_v1_0_12 -hdcp22_cipher_dp_v1_0_0 = E:/xilinx_libs/hdcp22_cipher_dp_v1_0_0 -hdcp22_cipher_v1_0_3 = E:/xilinx_libs/hdcp22_cipher_v1_0_3 -hdcp22_rng_v1_0_1 = E:/xilinx_libs/hdcp22_rng_v1_0_1 -hdcp_keymngmt_blk_v1_0_0 = E:/xilinx_libs/hdcp_keymngmt_blk_v1_0_0 -hdcp_v1_0_3 = E:/xilinx_libs/hdcp_v1_0_3 -hdmi_acr_ctrl_v1_0_0 = E:/xilinx_libs/hdmi_acr_ctrl_v1_0_0 -hdmi_gt_controller_v1_0_7 = E:/xilinx_libs/hdmi_gt_controller_v1_0_7 -high_speed_selectio_wiz_v3_6_3 = E:/xilinx_libs/high_speed_selectio_wiz_v3_6_3 -i2s_receiver_v1_0_5 = E:/xilinx_libs/i2s_receiver_v1_0_5 -i2s_transmitter_v1_0_5 = E:/xilinx_libs/i2s_transmitter_v1_0_5 -ibert_lib_v1_0_7 = E:/xilinx_libs/ibert_lib_v1_0_7 -ieee802d3_clause74_fec_v1_0_13 = E:/xilinx_libs/ieee802d3_clause74_fec_v1_0_13 -ilknf_v1_1_0 = E:/xilinx_libs/ilknf_v1_1_0 -interlaken_v2_4_11 = E:/xilinx_libs/interlaken_v2_4_11 -in_system_ibert_v1_0_16 = E:/xilinx_libs/in_system_ibert_v1_0_16 -iomodule_v3_1_8 = E:/xilinx_libs/iomodule_v3_1_8 -jesd204c_v4_2_8 = E:/xilinx_libs/jesd204c_v4_2_8 -jesd204_v7_2_15 = E:/xilinx_libs/jesd204_v7_2_15 -jtag_axi = E:/xilinx_libs/jtag_axi -lib_cdc_v1_0_2 = E:/xilinx_libs/lib_cdc_v1_0_2 -lib_pkg_v1_0_2 = E:/xilinx_libs/lib_pkg_v1_0_2 -ll_compress_v1_0_0 = E:/xilinx_libs/ll_compress_v1_0_0 -ll_compress_v1_1_0 = E:/xilinx_libs/ll_compress_v1_1_0 -ll_compress_v2_0_1 = E:/xilinx_libs/ll_compress_v2_0_1 -ll_compress_v2_1_0 = E:/xilinx_libs/ll_compress_v2_1_0 -lmb_bram_if_cntlr_v4_0_21 = E:/xilinx_libs/lmb_bram_if_cntlr_v4_0_21 -lmb_v10_v3_0_12 = E:/xilinx_libs/lmb_v10_v3_0_12 -ltlib_v1_0_0 = E:/xilinx_libs/ltlib_v1_0_0 -lut_buffer_v2_0_0 = E:/xilinx_libs/lut_buffer_v2_0_0 -l_ethernet_v3_3_0 = E:/xilinx_libs/l_ethernet_v3_3_0 -mammoth_transcode_v1_0_0 = E:/xilinx_libs/mammoth_transcode_v1_0_0 -mem_pl_v1_0_0 = E:/xilinx_libs/mem_pl_v1_0_0 -microblaze_v11_0_9 = E:/xilinx_libs/microblaze_v11_0_9 -microblaze_v9_5_4 = E:/xilinx_libs/microblaze_v9_5_4 -mipi_csi2_rx_ctrl_v1_0_8 = E:/xilinx_libs/mipi_csi2_rx_ctrl_v1_0_8 -mipi_csi2_tx_ctrl_v1_0_4 = E:/xilinx_libs/mipi_csi2_tx_ctrl_v1_0_4 -mipi_dphy_v4_3_4 = E:/xilinx_libs/mipi_dphy_v4_3_4 -mipi_dsi_tx_ctrl_v1_0_7 = E:/xilinx_libs/mipi_dsi_tx_ctrl_v1_0_7 -mpegtsmux_v1_1_4 = E:/xilinx_libs/mpegtsmux_v1_1_4 -mrmac_v1_6_0 = E:/xilinx_libs/mrmac_v1_6_0 -multi_channel_25g_rs_fec_v1_0_18 = E:/xilinx_libs/multi_channel_25g_rs_fec_v1_0_18 -mutex_v2_1_11 = E:/xilinx_libs/mutex_v2_1_11 -axi_tg_lib = E:/xilinx_libs/axi_tg_lib -noc_hbm_v1_0_0 = E:/xilinx_libs/noc_hbm_v1_0_0 -noc_ncrb_v1_0_0 = E:/xilinx_libs/noc_ncrb_v1_0_0 -noc_nidb_v1_0_0 = E:/xilinx_libs/noc_nidb_v1_0_0 -noc_nmu_phydir_v1_0_0 = E:/xilinx_libs/noc_nmu_phydir_v1_0_0 -noc_npp_rptr_v1_0_0 = E:/xilinx_libs/noc_npp_rptr_v1_0_0 -noc_nps4_v1_0_0 = E:/xilinx_libs/noc_nps4_v1_0_0 -noc_nps6_v1_0_0 = E:/xilinx_libs/noc_nps6_v1_0_0 -noc_nps_v1_0_0 = E:/xilinx_libs/noc_nps_v1_0_0 -noc_nsu_v1_0_0 = E:/xilinx_libs/noc_nsu_v1_0_0 -nvmeha_v1_0_7 = E:/xilinx_libs/nvmeha_v1_0_7 -nvme_tc_v3_0_1 = E:/xilinx_libs/nvme_tc_v3_0_1 -oddr_v1_0_2 = E:/xilinx_libs/oddr_v1_0_2 -oran_radio_if_v2_2_0 = E:/xilinx_libs/oran_radio_if_v2_2_0 -pci32_v5_0_12 = E:/xilinx_libs/pci32_v5_0_12 -pci64_v5_0_11 = E:/xilinx_libs/pci64_v5_0_11 -pcie_axi4lite_tap_v1_0_1 = E:/xilinx_libs/pcie_axi4lite_tap_v1_0_1 -pcie_dma_versal_v2_0_11 = E:/xilinx_libs/pcie_dma_versal_v2_0_11 -pcie_jtag_v1_0_0 = E:/xilinx_libs/pcie_jtag_v1_0_0 -pcie_qdma_mailbox_v1_0_0 = E:/xilinx_libs/pcie_qdma_mailbox_v1_0_0 -pc_cfr_v6_4_2 = E:/xilinx_libs/pc_cfr_v6_4_2 -pc_cfr_v7_0_1 = E:/xilinx_libs/pc_cfr_v7_0_1 -pc_cfr_v7_1_0 = E:/xilinx_libs/pc_cfr_v7_1_0 -picxo = E:/xilinx_libs/picxo -ptp_1588_timer_syncer_v1_0_2 = E:/xilinx_libs/ptp_1588_timer_syncer_v1_0_2 -ptp_1588_timer_syncer_v2_0_3 = E:/xilinx_libs/ptp_1588_timer_syncer_v2_0_3 -qdma_v4_0_13 = E:/xilinx_libs/qdma_v4_0_13 -qdriv_pl_v1_0_7 = E:/xilinx_libs/qdriv_pl_v1_0_7 -rama_v1_1_12_lib = E:/xilinx_libs/rama_v1_1_12_lib -rld3_pl_phy_v1_0_0 = E:/xilinx_libs/rld3_pl_phy_v1_0_0 -rld3_pl_v1_0_9 = E:/xilinx_libs/rld3_pl_v1_0_9 -roe_framer_v3_0_3 = E:/xilinx_libs/roe_framer_v3_0_3 -rst_vip_v1_0_4 = E:/xilinx_libs/rst_vip_v1_0_4 -smartconnect_v1_0 = E:/xilinx_libs/smartconnect_v1_0 -sem_ultra_v3_1_23 = E:/xilinx_libs/sem_ultra_v3_1_23 -sem_v4_1_13 = E:/xilinx_libs/sem_v4_1_13 -shell_utils_msp432_bsl_crc_gen_v1_0_0 = E:/xilinx_libs/shell_utils_msp432_bsl_crc_gen_v1_0_0 -sim_clk_gen_v1_0_3 = E:/xilinx_libs/sim_clk_gen_v1_0_3 -sim_rst_gen_v1_0_2 = E:/xilinx_libs/sim_rst_gen_v1_0_2 -sim_trig_v1_0_7 = E:/xilinx_libs/sim_trig_v1_0_7 -stm_v1_0 = E:/xilinx_libs/stm_v1_0 -stm_v1_0_0 = E:/xilinx_libs/stm_v1_0_0 -system_cache_v5_0_8 = E:/xilinx_libs/system_cache_v5_0_8 -ta_dma_v1_0_10 = E:/xilinx_libs/ta_dma_v1_0_10 -tcc_decoder_3gpplte_v3_0_6 = E:/xilinx_libs/tcc_decoder_3gpplte_v3_0_6 -ten_gig_eth_mac_v15_1_10 = E:/xilinx_libs/ten_gig_eth_mac_v15_1_10 -ten_gig_eth_pcs_pma_v6_0_22 = E:/xilinx_libs/ten_gig_eth_pcs_pma_v6_0_22 -timer_sync_1588_v1_2_4 = E:/xilinx_libs/timer_sync_1588_v1_2_4 -tmr_inject_v1_0_4 = E:/xilinx_libs/tmr_inject_v1_0_4 -tmr_manager_v1_0_10 = E:/xilinx_libs/tmr_manager_v1_0_10 -tmr_voter_v1_0_4 = E:/xilinx_libs/tmr_voter_v1_0_4 -trace_s2mm_v1_2_0 = E:/xilinx_libs/trace_s2mm_v1_2_0 -tsn_endpoint_ethernet_mac_block_v1_0_11 = E:/xilinx_libs/tsn_endpoint_ethernet_mac_block_v1_0_11 -uhdsdi_gt_v2_0_8 = E:/xilinx_libs/uhdsdi_gt_v2_0_8 -uram_rd_back_v1_0_2 = E:/xilinx_libs/uram_rd_back_v1_0_2 -usxgmii_v1_2_7 = E:/xilinx_libs/usxgmii_v1_2_7 -util_ff_v1_0_0 = E:/xilinx_libs/util_ff_v1_0_0 -util_idelay_ctrl_v1_0_2 = E:/xilinx_libs/util_idelay_ctrl_v1_0_2 -util_reduced_logic_v2_0_4 = E:/xilinx_libs/util_reduced_logic_v2_0_4 -util_vector_logic_v2_0_2 = E:/xilinx_libs/util_vector_logic_v2_0_2 -versal_cips_v3_2_1 = E:/xilinx_libs/versal_cips_v3_2_1 -vfb_v1_0_20 = E:/xilinx_libs/vfb_v1_0_20 -video_frame_crc_v1_0_4 = E:/xilinx_libs/video_frame_crc_v1_0_4 -vid_edid_v1_0_0 = E:/xilinx_libs/vid_edid_v1_0_0 -vid_phy_controller_v2_1_13 = E:/xilinx_libs/vid_phy_controller_v2_1_13 -vid_phy_controller_v2_2_13 = E:/xilinx_libs/vid_phy_controller_v2_2_13 -vitis_deadlock_detector_v1_0_1 = E:/xilinx_libs/vitis_deadlock_detector_v1_0_1 -v_axi4s_remap_v1_0_19 = E:/xilinx_libs/v_axi4s_remap_v1_0_19 -v_axi4s_remap_v1_1_5 = E:/xilinx_libs/v_axi4s_remap_v1_1_5 -v_csc_v1_1_5 = E:/xilinx_libs/v_csc_v1_1_5 -v_deinterlacer_v5_1_0 = E:/xilinx_libs/v_deinterlacer_v5_1_0 -v_demosaic_v1_1_5 = E:/xilinx_libs/v_demosaic_v1_1_5 -v_frmbuf_rd_v2_2_5 = E:/xilinx_libs/v_frmbuf_rd_v2_2_5 -v_frmbuf_wr_v2_2_5 = E:/xilinx_libs/v_frmbuf_wr_v2_2_5 -v_gamma_lut_v1_1_5 = E:/xilinx_libs/v_gamma_lut_v1_1_5 -v_hcresampler_v1_1_5 = E:/xilinx_libs/v_hcresampler_v1_1_5 -v_hdmi_phy1_v1_0_6 = E:/xilinx_libs/v_hdmi_phy1_v1_0_6 -v_hdmi_rx_v3_0_0 = E:/xilinx_libs/v_hdmi_rx_v3_0_0 -v_hdmi_tx_v3_0_0 = E:/xilinx_libs/v_hdmi_tx_v3_0_0 -v_hscaler_v1_1_5 = E:/xilinx_libs/v_hscaler_v1_1_5 -v_letterbox_v1_1_5 = E:/xilinx_libs/v_letterbox_v1_1_5 -v_mix_v5_1_5 = E:/xilinx_libs/v_mix_v5_1_5 -v_scenechange_v1_1_4 = E:/xilinx_libs/v_scenechange_v1_1_4 -v_sdi_rx_vid_bridge_v2_0_0 = E:/xilinx_libs/v_sdi_rx_vid_bridge_v2_0_0 -v_smpte_sdi_v3_0_9 = E:/xilinx_libs/v_smpte_sdi_v3_0_9 -v_smpte_uhdsdi_rx_v1_0_1 = E:/xilinx_libs/v_smpte_uhdsdi_rx_v1_0_1 -v_smpte_uhdsdi_tx_v1_0_1 = E:/xilinx_libs/v_smpte_uhdsdi_tx_v1_0_1 -v_smpte_uhdsdi_v1_0_9 = E:/xilinx_libs/v_smpte_uhdsdi_v1_0_9 -v_tpg_v8_0_9 = E:/xilinx_libs/v_tpg_v8_0_9 -v_tpg_v8_1_5 = E:/xilinx_libs/v_tpg_v8_1_5 -v_tpg_v8_2_1 = E:/xilinx_libs/v_tpg_v8_2_1 -v_uhdsdi_audio_v2_0_6 = E:/xilinx_libs/v_uhdsdi_audio_v2_0_6 -v_uhdsdi_vidgen_v1_0_1 = E:/xilinx_libs/v_uhdsdi_vidgen_v1_0_1 -v_vcresampler_v1_1_5 = E:/xilinx_libs/v_vcresampler_v1_1_5 -v_vid_in_axi4s_v4_0_9 = E:/xilinx_libs/v_vid_in_axi4s_v4_0_9 -v_vid_in_axi4s_v5_0_1 = E:/xilinx_libs/v_vid_in_axi4s_v5_0_1 -v_vscaler_v1_1_5 = E:/xilinx_libs/v_vscaler_v1_1_5 -v_warp_filter_v1_0_2 = E:/xilinx_libs/v_warp_filter_v1_0_2 -v_warp_init_v1_0_2 = E:/xilinx_libs/v_warp_init_v1_0_2 -xbip_dsp48_wrapper_v3_0_4 = E:/xilinx_libs/xbip_dsp48_wrapper_v3_0_4 -xbip_utils_v3_0_10 = E:/xilinx_libs/xbip_utils_v3_0_10 -xdfe_nlf_v1_0_1 = E:/xilinx_libs/xdfe_nlf_v1_0_1 -xdfe_resampler_v1_0_4 = E:/xilinx_libs/xdfe_resampler_v1_0_4 -xdma_v4_1_19 = E:/xilinx_libs/xdma_v4_1_19 -xlconcat_v2_1_4 = E:/xilinx_libs/xlconcat_v2_1_4 -xlconstant_v1_1_7 = E:/xilinx_libs/xlconstant_v1_1_7 -xlslice_v1_0_2 = E:/xilinx_libs/xlslice_v1_0_2 -xpm_cdc_gen_v1_0_1 = E:/xilinx_libs/xpm_cdc_gen_v1_0_1 -xsdbm_v3_0_0 = E:/xilinx_libs/xsdbm_v3_0_0 -xxv_ethernet_v4_1_0 = E:/xilinx_libs/xxv_ethernet_v4_1_0 -aurora_8b10b_versal_v1_0_1 = E:/xilinx_libs/aurora_8b10b_versal_v1_0_1 -axi_c2c_v1_0_3 = E:/xilinx_libs/axi_c2c_v1_0_3 -lib_srl_fifo_v1_0_2 = E:/xilinx_libs/lib_srl_fifo_v1_0_2 -lib_fifo_v1_0_16 = E:/xilinx_libs/lib_fifo_v1_0_16 -axi_datamover_v5_1_28 = E:/xilinx_libs/axi_datamover_v5_1_28 -amm_axi_bridge_v1_0_12 = E:/xilinx_libs/amm_axi_bridge_v1_0_12 -axis_register_slice_v1_1_26 = E:/xilinx_libs/axis_register_slice_v1_1_26 -axis_switch_v1_1_26 = E:/xilinx_libs/axis_switch_v1_1_26 -axis_clock_converter_v1_1_27 = E:/xilinx_libs/axis_clock_converter_v1_1_27 -axis_data_fifo_v2_0_8 = E:/xilinx_libs/axis_data_fifo_v2_0_8 -ats_switch_v1_0_5 = E:/xilinx_libs/ats_switch_v1_0_5 -audio_formatter_v1_0_8 = E:/xilinx_libs/audio_formatter_v1_0_8 -axi4stream_vip_v1_1_12 = E:/xilinx_libs/axi4stream_vip_v1_1_12 -v_tc_v6_2_4 = E:/xilinx_libs/v_tc_v6_2_4 -v_dp_axi4s_vid_out_v1_0_4 = E:/xilinx_libs/v_dp_axi4s_vid_out_v1_0_4 -v_tc_v6_1_13 = E:/xilinx_libs/v_tc_v6_1_13 -v_axi4s_vid_out_v4_0_14 = E:/xilinx_libs/v_axi4s_vid_out_v4_0_14 -axi4svideo_bridge_v1_0_14 = E:/xilinx_libs/axi4svideo_bridge_v1_0_14 -axis_accelerator_adapter_v2_1_16 = E:/xilinx_libs/axis_accelerator_adapter_v2_1_16 -axis_broadcaster_v1_1_25 = E:/xilinx_libs/axis_broadcaster_v1_1_25 -axis_combiner_v1_1_24 = E:/xilinx_libs/axis_combiner_v1_1_24 -axis_data_fifo_v1_1_27 = E:/xilinx_libs/axis_data_fifo_v1_1_27 -axis_dwidth_converter_v1_1_25 = E:/xilinx_libs/axis_dwidth_converter_v1_1_25 -axis_ila_intf_v1_0_0 = E:/xilinx_libs/axis_ila_intf_v1_0_0 -axis_interconnect_v1_1_20 = E:/xilinx_libs/axis_interconnect_v1_1_20 -axis_subset_converter_v1_1_26 = E:/xilinx_libs/axis_subset_converter_v1_1_26 -axis_vio_v1_0_6 = E:/xilinx_libs/axis_vio_v1_0_6 -axi_apb_bridge_v3_0_17 = E:/xilinx_libs/axi_apb_bridge_v3_0_17 -axi_bram_ctrl_v4_0_14 = E:/xilinx_libs/axi_bram_ctrl_v4_0_14 -axi_sg_v4_1_15 = E:/xilinx_libs/axi_sg_v4_1_15 -axi_cdma_v4_1_26 = E:/xilinx_libs/axi_cdma_v4_1_26 -axi_clock_converter_v2_1_25 = E:/xilinx_libs/axi_clock_converter_v2_1_25 -axi_data_fifo_v2_1_25 = E:/xilinx_libs/axi_data_fifo_v2_1_25 -axi_register_slice_v2_1_26 = E:/xilinx_libs/axi_register_slice_v2_1_26 -axi_crossbar_v2_1_27 = E:/xilinx_libs/axi_crossbar_v2_1_27 -axi_dma_v7_1_27 = E:/xilinx_libs/axi_dma_v7_1_27 -axi_protocol_converter_v2_1_26 = E:/xilinx_libs/axi_protocol_converter_v2_1_26 -axi_dwidth_converter_v2_1_26 = E:/xilinx_libs/axi_dwidth_converter_v2_1_26 -axi_emc_v3_0_26 = E:/xilinx_libs/axi_emc_v3_0_26 -axi_epc_v2_0_29 = E:/xilinx_libs/axi_epc_v2_0_29 -lib_bmg_v1_0_14 = E:/xilinx_libs/lib_bmg_v1_0_14 -axi_ethernetlite_v3_0_25 = E:/xilinx_libs/axi_ethernetlite_v3_0_25 -axi_ethernet_buffer_v2_0_24 = E:/xilinx_libs/axi_ethernet_buffer_v2_0_24 -axi_fifo_mm_s_v4_2_8 = E:/xilinx_libs/axi_fifo_mm_s_v4_2_8 -axi_firewall_v1_1_5 = E:/xilinx_libs/axi_firewall_v1_1_5 -axi_firewall_v1_2_1 = E:/xilinx_libs/axi_firewall_v1_2_1 -interrupt_control_v3_1_4 = E:/xilinx_libs/interrupt_control_v3_1_4 -axi_gpio_v2_0_28 = E:/xilinx_libs/axi_gpio_v2_0_28 -axi_hbicap_v1_0_4 = E:/xilinx_libs/axi_hbicap_v1_0_4 -axi_hwicap_v3_0_30 = E:/xilinx_libs/axi_hwicap_v3_0_30 -axi_iic_v2_1_2 = E:/xilinx_libs/axi_iic_v2_1_2 -axi_intc_v4_1_17 = E:/xilinx_libs/axi_intc_v4_1_17 -axi_interconnect_v1_7_20 = E:/xilinx_libs/axi_interconnect_v1_7_20 -axi_master_burst_v2_0_7 = E:/xilinx_libs/axi_master_burst_v2_0_7 -axi_msg_v1_0_8 = E:/xilinx_libs/axi_msg_v1_0_8 -axi_mcdma_v1_1_7 = E:/xilinx_libs/axi_mcdma_v1_1_7 -axi_memory_init_v1_0_7 = E:/xilinx_libs/axi_memory_init_v1_0_7 -axi_mm2s_mapper_v1_1_25 = E:/xilinx_libs/axi_mm2s_mapper_v1_1_25 -axi_mmu_v2_1_24 = E:/xilinx_libs/axi_mmu_v2_1_24 -axi_pcie_v2_9_7 = E:/xilinx_libs/axi_pcie_v2_9_7 -axi_protocol_checker_v2_0_12 = E:/xilinx_libs/axi_protocol_checker_v2_0_12 -axi_quad_spi_v3_2_25 = E:/xilinx_libs/axi_quad_spi_v3_2_25 -axi_sideband_util_v1_0_10 = E:/xilinx_libs/axi_sideband_util_v1_0_10 -axi_tft_v2_0_25 = E:/xilinx_libs/axi_tft_v2_0_25 -axi_timebase_wdt_v3_0_18 = E:/xilinx_libs/axi_timebase_wdt_v3_0_18 -axi_timer_v2_0_28 = E:/xilinx_libs/axi_timer_v2_0_28 -axi_traffic_gen_v3_0_12 = E:/xilinx_libs/axi_traffic_gen_v3_0_12 -axi_uart16550_v2_0_28 = E:/xilinx_libs/axi_uart16550_v2_0_28 -axi_uartlite_v2_0_30 = E:/xilinx_libs/axi_uartlite_v2_0_30 -axi_usb2_device_v5_0_27 = E:/xilinx_libs/axi_usb2_device_v5_0_27 -axi_utils_v2_0_6 = E:/xilinx_libs/axi_utils_v2_0_6 -axi_vdma_v6_3_14 = E:/xilinx_libs/axi_vdma_v6_3_14 -xbip_pipe_v3_0_6 = E:/xilinx_libs/xbip_pipe_v3_0_6 -xbip_dsp48_addsub_v3_0_6 = E:/xilinx_libs/xbip_dsp48_addsub_v3_0_6 -xbip_addsub_v3_0_6 = E:/xilinx_libs/xbip_addsub_v3_0_6 -c_reg_fd_v12_0_6 = E:/xilinx_libs/c_reg_fd_v12_0_6 -c_addsub_v12_0_14 = E:/xilinx_libs/c_addsub_v12_0_14 -axi_vfifo_ctrl_v2_0_28 = E:/xilinx_libs/axi_vfifo_ctrl_v2_0_28 -axi_vip_v1_1_12 = E:/xilinx_libs/axi_vip_v1_1_12 -bs_switch_v1_0_0 = E:/xilinx_libs/bs_switch_v1_0_0 -canfd_v3_0_5 = E:/xilinx_libs/canfd_v3_0_5 -can_v5_0_29 = E:/xilinx_libs/can_v5_0_29 -cic_compiler_v4_0_16 = E:/xilinx_libs/cic_compiler_v4_0_16 -xbip_bram18k_v3_0_6 = E:/xilinx_libs/xbip_bram18k_v3_0_6 -mult_gen_v12_0_18 = E:/xilinx_libs/mult_gen_v12_0_18 -cmpy_v6_0_21 = E:/xilinx_libs/cmpy_v6_0_21 -c_mux_bit_v12_0_6 = E:/xilinx_libs/c_mux_bit_v12_0_6 -c_shift_ram_v12_0_14 = E:/xilinx_libs/c_shift_ram_v12_0_14 -c_mux_bus_v12_0_6 = E:/xilinx_libs/c_mux_bus_v12_0_6 -c_gate_bit_v12_0_6 = E:/xilinx_libs/c_gate_bit_v12_0_6 -xbip_counter_v3_0_6 = E:/xilinx_libs/xbip_counter_v3_0_6 -c_counter_binary_v12_0_15 = E:/xilinx_libs/c_counter_binary_v12_0_15 -c_compare_v12_0_6 = E:/xilinx_libs/c_compare_v12_0_6 -convolution_v9_0_16 = E:/xilinx_libs/convolution_v9_0_16 -cordic_v6_0_18 = E:/xilinx_libs/cordic_v6_0_18 -cpri_v8_11_12 = E:/xilinx_libs/cpri_v8_11_12 -xbip_dsp48_acc_v3_0_6 = E:/xilinx_libs/xbip_dsp48_acc_v3_0_6 -xbip_accum_v3_0_6 = E:/xilinx_libs/xbip_accum_v3_0_6 -c_accum_v12_0_14 = E:/xilinx_libs/c_accum_v12_0_14 -dbg_intf = E:/xilinx_libs/dbg_intf -xbip_dsp48_multadd_v3_0_6 = E:/xilinx_libs/xbip_dsp48_multadd_v3_0_6 -dds_compiler_v6_0_22 = E:/xilinx_libs/dds_compiler_v6_0_22 -dft_v4_0_16 = E:/xilinx_libs/dft_v4_0_16 -dft_v4_2_3 = E:/xilinx_libs/dft_v4_2_3 -dfx_axi_shutdown_manager_v1_0_0 = E:/xilinx_libs/dfx_axi_shutdown_manager_v1_0_0 -dfx_bitstream_monitor_v1_0_1 = E:/xilinx_libs/dfx_bitstream_monitor_v1_0_1 -dfx_controller_v1_0_3 = E:/xilinx_libs/dfx_controller_v1_0_3 -dfx_decoupler_v1_0_4 = E:/xilinx_libs/dfx_decoupler_v1_0_4 -displayport_v7_0_0 = E:/xilinx_libs/displayport_v7_0_0 -displayport_v9_0_5 = E:/xilinx_libs/displayport_v9_0_5 -xbip_dsp48_mult_v3_0_6 = E:/xilinx_libs/xbip_dsp48_mult_v3_0_6 -floating_point_v7_0_20 = E:/xilinx_libs/floating_point_v7_0_20 -div_gen_v5_1_19 = E:/xilinx_libs/div_gen_v5_1_19 -dsp_macro_v1_0_2 = E:/xilinx_libs/dsp_macro_v1_0_2 -ernic_v3_1_2 = E:/xilinx_libs/ernic_v3_1_2 -etrnic_v1_1_5 = E:/xilinx_libs/etrnic_v1_1_5 -fc32_rs_fec_v1_0_21 = E:/xilinx_libs/fc32_rs_fec_v1_0_21 -fec_5g_common_v1_1_1 = E:/xilinx_libs/fec_5g_common_v1_1_1 -fir_compiler_v5_2_6 = E:/xilinx_libs/fir_compiler_v5_2_6 -fir_compiler_v7_2_18 = E:/xilinx_libs/fir_compiler_v7_2_18 -flexo_100g_rs_fec_v1_0_22 = E:/xilinx_libs/flexo_100g_rs_fec_v1_0_22 -floating_point_v7_1_14 = E:/xilinx_libs/floating_point_v7_1_14 -g709_rs_encoder_v2_2_8 = E:/xilinx_libs/g709_rs_encoder_v2_2_8 -rs_toolbox_v9_0_9 = E:/xilinx_libs/rs_toolbox_v9_0_9 -g709_rs_decoder_v2_2_10 = E:/xilinx_libs/g709_rs_decoder_v2_2_10 -g709_fec_v2_4_5 = E:/xilinx_libs/g709_fec_v2_4_5 -g975_efec_i4_v1_0_18 = E:/xilinx_libs/g975_efec_i4_v1_0_18 -g975_efec_i7_v2_0_18 = E:/xilinx_libs/g975_efec_i7_v2_0_18 -hw_trace = E:/xilinx_libs/hw_trace -icap_arb_v1_0_1 = E:/xilinx_libs/icap_arb_v1_0_1 -ieee802d3_200g_rs_fec_v2_0_5 = E:/xilinx_libs/ieee802d3_200g_rs_fec_v2_0_5 -ieee802d3_25g_rs_fec_v1_0_23 = E:/xilinx_libs/ieee802d3_25g_rs_fec_v1_0_23 -ieee802d3_400g_rs_fec_v2_0_8 = E:/xilinx_libs/ieee802d3_400g_rs_fec_v2_0_8 -ieee802d3_50g_rs_fec_v1_0_19 = E:/xilinx_libs/ieee802d3_50g_rs_fec_v1_0_19 -ieee802d3_50g_rs_fec_v2_0_11 = E:/xilinx_libs/ieee802d3_50g_rs_fec_v2_0_11 -ieee802d3_rs_fec_v2_0_15 = E:/xilinx_libs/ieee802d3_rs_fec_v2_0_15 -ldpc_v2_0_10 = E:/xilinx_libs/ldpc_v2_0_10 -xfft_v7_2_13 = E:/xilinx_libs/xfft_v7_2_13 -lte_fft_v2_0_22 = E:/xilinx_libs/lte_fft_v2_0_22 -xfft_v9_1_8 = E:/xilinx_libs/xfft_v9_1_8 -lte_fft_v2_1_6 = E:/xilinx_libs/lte_fft_v2_1_6 -mailbox_v2_1_15 = E:/xilinx_libs/mailbox_v2_1_15 -mdm_v3_2_23 = E:/xilinx_libs/mdm_v3_2_23 -mem_tg_v1_0_8 = E:/xilinx_libs/mem_tg_v1_0_8 -iomodule_v3_0 = E:/xilinx_libs/iomodule_v3_0 -lmb_bram_if_cntlr_v4_0 = E:/xilinx_libs/lmb_bram_if_cntlr_v4_0 -lmb_v10_v3_0 = E:/xilinx_libs/lmb_v10_v3_0 -axi_lite_ipif_v3_0 = E:/xilinx_libs/axi_lite_ipif_v3_0 -mdm_v3_2 = E:/xilinx_libs/mdm_v3_2 -microblaze_mcs_v2_3_6 = E:/xilinx_libs/microblaze_mcs_v2_3_6 -perf_axi_tg_v1_0_8 = E:/xilinx_libs/perf_axi_tg_v1_0_8 -polar_v1_0_10 = E:/xilinx_libs/polar_v1_0_10 -polar_v1_1_0 = E:/xilinx_libs/polar_v1_1_0 -processing_system7_vip_v1_0_14 = E:/xilinx_libs/processing_system7_vip_v1_0_14 -proc_sys_reset_v5_0_13 = E:/xilinx_libs/proc_sys_reset_v5_0_13 -pr_decoupler_v1_0_10 = E:/xilinx_libs/pr_decoupler_v1_0_10 -qdriv_pl_phy_v1_0_0 = E:/xilinx_libs/qdriv_pl_phy_v1_0_0 -quadsgmii_v3_5_8 = E:/xilinx_libs/quadsgmii_v3_5_8 -rs_decoder_v9_0_18 = E:/xilinx_libs/rs_decoder_v9_0_18 -rs_encoder_v9_0_17 = E:/xilinx_libs/rs_encoder_v9_0_17 -sd_fec_v1_1_9 = E:/xilinx_libs/sd_fec_v1_1_9 -shell_utils_addr_remap_v1_0_5 = E:/xilinx_libs/shell_utils_addr_remap_v1_0_5 -sid_v8_0_17 = E:/xilinx_libs/sid_v8_0_17 -soft_ecc_proxy_v1_0_1 = E:/xilinx_libs/soft_ecc_proxy_v1_0_1 -spdif_v2_0_26 = E:/xilinx_libs/spdif_v2_0_26 -srio_gen2_v4_1_14 = E:/xilinx_libs/srio_gen2_v4_1_14 -switch_core_top_v1_0_11 = E:/xilinx_libs/switch_core_top_v1_0_11 -tcc_decoder_3gppmm_v2_0_23 = E:/xilinx_libs/tcc_decoder_3gppmm_v2_0_23 -tcc_encoder_3gpplte_v4_0_16 = E:/xilinx_libs/tcc_encoder_3gpplte_v4_0_16 -tcc_encoder_3gpp_v5_0_18 = E:/xilinx_libs/tcc_encoder_3gpp_v5_0_18 -tmr_comparator_v1_0_5 = E:/xilinx_libs/tmr_comparator_v1_0_5 -tmr_sem_v1_0_22 = E:/xilinx_libs/tmr_sem_v1_0_22 -tri_mode_ethernet_mac_v9_0_22 = E:/xilinx_libs/tri_mode_ethernet_mac_v9_0_22 -tsn_temac_v1_0_7 = E:/xilinx_libs/tsn_temac_v1_0_7 -vby1hs_v1_0_2 = E:/xilinx_libs/vby1hs_v1_0_2 -versal_cips_ps_vip_v1_0_4 = E:/xilinx_libs/versal_cips_ps_vip_v1_0_4 -videoaxi4s_bridge_v1_0_5 = E:/xilinx_libs/videoaxi4s_bridge_v1_0_5 -viterbi_v9_1_13 = E:/xilinx_libs/viterbi_v9_1_13 -vitis_net_p4_v1_1_0 = E:/xilinx_libs/vitis_net_p4_v1_1_0 -v_dual_splitter_v1_0_9 = E:/xilinx_libs/v_dual_splitter_v1_0_9 -v_frmbuf_rd_v2_3_1 = E:/xilinx_libs/v_frmbuf_rd_v2_3_1 -v_frmbuf_rd_v2_4_0 = E:/xilinx_libs/v_frmbuf_rd_v2_4_0 -v_frmbuf_wr_v2_3_1 = E:/xilinx_libs/v_frmbuf_wr_v2_3_1 -v_frmbuf_wr_v2_4_0 = E:/xilinx_libs/v_frmbuf_wr_v2_4_0 -v_hdmi_rx1_v1_0_3 = E:/xilinx_libs/v_hdmi_rx1_v1_0_3 -v_hdmi_tx1_v1_0_3 = E:/xilinx_libs/v_hdmi_tx1_v1_0_3 -v_mix_v5_2_3 = E:/xilinx_libs/v_mix_v5_2_3 -v_multi_scaler_v1_2_3 = E:/xilinx_libs/v_multi_scaler_v1_2_3 -v_vid_gt_bridge_v1_0_5 = E:/xilinx_libs/v_vid_gt_bridge_v1_0_5 -v_vid_sdi_tx_bridge_v2_0_0 = E:/xilinx_libs/v_vid_sdi_tx_bridge_v2_0_0 -v_warp_filter_v1_1_0 = E:/xilinx_libs/v_warp_filter_v1_1_0 -v_warp_init_v1_1_0 = E:/xilinx_libs/v_warp_init_v1_1_0 -xbip_dsp48_multacc_v3_0_6 = E:/xilinx_libs/xbip_dsp48_multacc_v3_0_6 -xbip_multadd_v3_0_17 = E:/xilinx_libs/xbip_multadd_v3_0_17 -xdfe_common_v1_0_0 = E:/xilinx_libs/xdfe_common_v1_0_0 -xdfe_cc_filter_v1_0_4 = E:/xilinx_libs/xdfe_cc_filter_v1_0_4 -xdfe_cc_mixer_v1_0_4 = E:/xilinx_libs/xdfe_cc_mixer_v1_0_4 -xdfe_equalizer_v1_0_4 = E:/xilinx_libs/xdfe_equalizer_v1_0_4 -xdfe_fft_v1_0_4 = E:/xilinx_libs/xdfe_fft_v1_0_4 -xdfe_nr_prach_v1_0_4 = E:/xilinx_libs/xdfe_nr_prach_v1_0_4 -xsdbs_v1_0_2 = E:/xilinx_libs/xsdbs_v1_0_2 -zynq_ultra_ps_e_vip_v1_0_12 = E:/xilinx_libs/zynq_ultra_ps_e_vip_v1_0_12 +secureip = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/secureip +unisim = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/unisim +unimacro = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/unimacro +unifast = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/unifast +unisims_ver = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/unisims_ver +unimacro_ver = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/unimacro_ver +unifast_ver = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/unifast_ver +simprims_ver = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/simprims_ver +xpm = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xpm +xilinx_vip = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xilinx_vip +adc_dac_if_phy_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/adc_dac_if_phy_v1_0_0 +advanced_io_wizard_phy_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/advanced_io_wizard_phy_v1_0_0 +advanced_io_wizard_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/advanced_io_wizard_v1_0_7 +ahblite_axi_bridge_v3_0_21 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ahblite_axi_bridge_v3_0_21 +ai_noc = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ai_noc +ai_pl_trig = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ai_pl_trig +ai_pl = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ai_pl +an_lt_v1_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/an_lt_v1_0_6 +audio_clock_recovery_unit_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/audio_clock_recovery_unit_v1_0_2 +audio_tpg_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/audio_tpg_v1_0_0 +av_pat_gen_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/av_pat_gen_v1_0_1 +av_pat_gen_v2_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/av_pat_gen_v2_0_0 +axis_cap_ctrl_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_cap_ctrl_v1_0_0 +axis_dbg_stub_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_dbg_stub_v1_0_0 +axis_dbg_sync_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_dbg_sync_v1_0_0 +axis_ila_adv_trig_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_ila_adv_trig_v1_0_0 +axis_ila_ct_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_ila_ct_v1_0_0 +axis_ila_pp_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_ila_pp_v1_0_0 +axis_ila_txns_cntr_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_ila_txns_cntr_v1_0_0 +axis_infrastructure_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_infrastructure_v1_1_0 +axis_itct_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_itct_v1_0_0 +axis_mem_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_mem_v1_0_0 +axis_mu_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_mu_v1_0_0 +axis_protocol_checker_v2_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_protocol_checker_v2_0_10 +axi_ahblite_bridge_v3_0_23 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_ahblite_bridge_v3_0_23 +axi_amm_bridge_v1_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_amm_bridge_v1_0_16 +axi_bram_ctrl_v4_1_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_bram_ctrl_v4_1_6 +axi_chip2chip_v5_0_15 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_chip2chip_v5_0_15 +axi_dbg_hub = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_dbg_hub +axi_infrastructure_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_infrastructure_v1_1_0 +axi_jtag_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_jtag_v1_0_0 +axi_lite_ipif_v3_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_lite_ipif_v3_0_4 +axi_lmb_bridge_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_lmb_bridge_v1_0_0 +axi_pcie3_v3_0_22 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_pcie3_v3_0_22 +axi_perf_mon_v5_0_28 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_perf_mon_v5_0_28 +axi_pmon_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_pmon_v1_0_0 +axi_remapper_rx_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_remapper_rx_v1_0_0 +axi_remapper_tx_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_remapper_tx_v1_0_0 +blk_mem_gen_v8_3_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/blk_mem_gen_v8_3_6 +blk_mem_gen_v8_4_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/blk_mem_gen_v8_4_5 +bsip_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/bsip_v1_1_0 +bs_mux_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/bs_mux_v1_0_0 +cam_v2_3_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cam_v2_3_0 +clk_gen_sim_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/clk_gen_sim_v1_0_2 +clk_vip_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/clk_vip_v1_0_2 +cmac_usplus_v3_1_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cmac_usplus_v3_1_9 +cmac_v2_6_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cmac_v2_6_7 +compact_gt_v1_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/compact_gt_v1_0_12 +cpm4_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cpm4_v1_0_7 +cpm5_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cpm5_v1_0_7 +dcmac_v2_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dcmac_v2_0_0 +ddr4_pl_phy_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ddr4_pl_phy_v1_0_0 +ddr4_pl_v1_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ddr4_pl_v1_0_8 +displayport_v8_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/displayport_v8_1_5 +dist_mem_gen_v8_0_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dist_mem_gen_v8_0_13 +dprx_fec_8b10b_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dprx_fec_8b10b_v1_0_1 +dp_videoaxi4s_bridge_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dp_videoaxi4s_bridge_v1_0_1 +ecc_v2_0_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ecc_v2_0_13 +emb_fifo_gen_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/emb_fifo_gen_v1_0_2 +emb_mem_gen_v1_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/emb_mem_gen_v1_0_6 +emc_common_v3_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/emc_common_v3_0_5 +ethernet_1_10_25g_v2_7_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ethernet_1_10_25g_v2_7_5 +fast_adapter_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fast_adapter_v1_0_3 +fifo_generator_v13_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fifo_generator_v13_0_6 +fifo_generator_v13_1_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fifo_generator_v13_1_4 +fifo_generator_v13_2_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fifo_generator_v13_2_7 +fit_timer_v2_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fit_timer_v2_0_10 +generic_baseblocks_v2_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/generic_baseblocks_v2_1_0 +gigantic_mux = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/gigantic_mux +gig_ethernet_pcs_pma_v16_2_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/gig_ethernet_pcs_pma_v16_2_8 +gmii_to_rgmii_v4_1_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/gmii_to_rgmii_v4_1_4 +gtwizard_ultrascale_v1_5_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/gtwizard_ultrascale_v1_5_4 +gtwizard_ultrascale_v1_6_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/gtwizard_ultrascale_v1_6_13 +gtwizard_ultrascale_v1_7_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/gtwizard_ultrascale_v1_7_13 +hbm2e_pl_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hbm2e_pl_v1_0_0 +hbm_v1_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hbm_v1_0_12 +hdcp22_cipher_dp_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdcp22_cipher_dp_v1_0_0 +hdcp22_cipher_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdcp22_cipher_v1_0_3 +hdcp22_rng_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdcp22_rng_v1_0_1 +hdcp_keymngmt_blk_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdcp_keymngmt_blk_v1_0_0 +hdcp_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdcp_v1_0_3 +hdmi_acr_ctrl_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdmi_acr_ctrl_v1_0_0 +hdmi_gt_controller_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hdmi_gt_controller_v1_0_7 +high_speed_selectio_wiz_v3_6_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/high_speed_selectio_wiz_v3_6_3 +i2s_receiver_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/i2s_receiver_v1_0_5 +i2s_transmitter_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/i2s_transmitter_v1_0_5 +ibert_lib_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ibert_lib_v1_0_7 +ieee802d3_clause74_fec_v1_0_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_clause74_fec_v1_0_13 +ilknf_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ilknf_v1_1_0 +interlaken_v2_4_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/interlaken_v2_4_11 +in_system_ibert_v1_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/in_system_ibert_v1_0_16 +iomodule_v3_1_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/iomodule_v3_1_8 +jesd204c_v4_2_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/jesd204c_v4_2_8 +jesd204_v7_2_15 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/jesd204_v7_2_15 +jtag_axi = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/jtag_axi +lib_cdc_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lib_cdc_v1_0_2 +lib_pkg_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lib_pkg_v1_0_2 +ll_compress_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ll_compress_v1_0_0 +ll_compress_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ll_compress_v1_1_0 +ll_compress_v2_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ll_compress_v2_0_1 +ll_compress_v2_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ll_compress_v2_1_0 +lmb_bram_if_cntlr_v4_0_21 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lmb_bram_if_cntlr_v4_0_21 +lmb_v10_v3_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lmb_v10_v3_0_12 +ltlib_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ltlib_v1_0_0 +lut_buffer_v2_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lut_buffer_v2_0_0 +l_ethernet_v3_3_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/l_ethernet_v3_3_0 +mammoth_transcode_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mammoth_transcode_v1_0_0 +mem_pl_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mem_pl_v1_0_0 +microblaze_v11_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/microblaze_v11_0_9 +microblaze_v9_5_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/microblaze_v9_5_4 +mipi_csi2_rx_ctrl_v1_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mipi_csi2_rx_ctrl_v1_0_8 +mipi_csi2_tx_ctrl_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mipi_csi2_tx_ctrl_v1_0_4 +mipi_dphy_v4_3_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mipi_dphy_v4_3_4 +mipi_dsi_tx_ctrl_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mipi_dsi_tx_ctrl_v1_0_7 +mpegtsmux_v1_1_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mpegtsmux_v1_1_4 +mrmac_v1_6_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mrmac_v1_6_0 +multi_channel_25g_rs_fec_v1_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/multi_channel_25g_rs_fec_v1_0_18 +mutex_v2_1_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mutex_v2_1_11 +axi_tg_lib = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_tg_lib +noc_hbm_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_hbm_v1_0_0 +noc_ncrb_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_ncrb_v1_0_0 +noc_nidb_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_nidb_v1_0_0 +noc_nmu_phydir_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_nmu_phydir_v1_0_0 +noc_npp_rptr_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_npp_rptr_v1_0_0 +noc_nps4_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_nps4_v1_0_0 +noc_nps6_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_nps6_v1_0_0 +noc_nps_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_nps_v1_0_0 +noc_nsu_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/noc_nsu_v1_0_0 +nvmeha_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/nvmeha_v1_0_7 +nvme_tc_v3_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/nvme_tc_v3_0_1 +oddr_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/oddr_v1_0_2 +oran_radio_if_v2_2_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/oran_radio_if_v2_2_0 +pci32_v5_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pci32_v5_0_12 +pci64_v5_0_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pci64_v5_0_11 +pcie_axi4lite_tap_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pcie_axi4lite_tap_v1_0_1 +pcie_dma_versal_v2_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pcie_dma_versal_v2_0_9 +pcie_jtag_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pcie_jtag_v1_0_0 +pcie_qdma_mailbox_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pcie_qdma_mailbox_v1_0_0 +pc_cfr_v6_4_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pc_cfr_v6_4_2 +pc_cfr_v7_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pc_cfr_v7_0_1 +pc_cfr_v7_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pc_cfr_v7_1_0 +picxo = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/picxo +ptp_1588_timer_syncer_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ptp_1588_timer_syncer_v1_0_2 +ptp_1588_timer_syncer_v2_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ptp_1588_timer_syncer_v2_0_3 +qdma_v4_0_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/qdma_v4_0_11 +qdriv_pl_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/qdriv_pl_v1_0_7 +rama_v1_1_12_lib = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rama_v1_1_12_lib +rld3_pl_phy_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rld3_pl_phy_v1_0_0 +rld3_pl_v1_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rld3_pl_v1_0_9 +roe_framer_v3_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/roe_framer_v3_0_3 +rst_vip_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rst_vip_v1_0_4 +smartconnect_v1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/smartconnect_v1_0 +sem_ultra_v3_1_23 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sem_ultra_v3_1_23 +sem_v4_1_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sem_v4_1_13 +shell_utils_msp432_bsl_crc_gen_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/shell_utils_msp432_bsl_crc_gen_v1_0_0 +sim_clk_gen_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sim_clk_gen_v1_0_3 +sim_rst_gen_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sim_rst_gen_v1_0_2 +sim_trig_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sim_trig_v1_0_7 +stm_v1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/stm_v1_0 +stm_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/stm_v1_0_0 +system_cache_v5_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/system_cache_v5_0_8 +ta_dma_v1_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ta_dma_v1_0_10 +tcc_decoder_3gpplte_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tcc_decoder_3gpplte_v3_0_6 +ten_gig_eth_mac_v15_1_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ten_gig_eth_mac_v15_1_10 +ten_gig_eth_pcs_pma_v6_0_22 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ten_gig_eth_pcs_pma_v6_0_22 +timer_sync_1588_v1_2_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/timer_sync_1588_v1_2_4 +tmr_inject_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tmr_inject_v1_0_4 +tmr_manager_v1_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tmr_manager_v1_0_9 +tmr_voter_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tmr_voter_v1_0_4 +trace_s2mm_v1_2_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/trace_s2mm_v1_2_0 +tsn_endpoint_ethernet_mac_block_v1_0_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tsn_endpoint_ethernet_mac_block_v1_0_11 +uhdsdi_gt_v2_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/uhdsdi_gt_v2_0_8 +uram_rd_back_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/uram_rd_back_v1_0_2 +usxgmii_v1_2_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/usxgmii_v1_2_7 +util_ff_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/util_ff_v1_0_0 +util_idelay_ctrl_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/util_idelay_ctrl_v1_0_2 +util_reduced_logic_v2_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/util_reduced_logic_v2_0_4 +util_vector_logic_v2_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/util_vector_logic_v2_0_2 +vfb_v1_0_20 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/vfb_v1_0_20 +video_frame_crc_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/video_frame_crc_v1_0_4 +vid_edid_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/vid_edid_v1_0_0 +vid_phy_controller_v2_1_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/vid_phy_controller_v2_1_13 +vid_phy_controller_v2_2_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/vid_phy_controller_v2_2_13 +vitis_deadlock_detector_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/vitis_deadlock_detector_v1_0_1 +v_axi4s_remap_v1_0_19 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_axi4s_remap_v1_0_19 +v_axi4s_remap_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_axi4s_remap_v1_1_5 +v_csc_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_csc_v1_1_5 +v_deinterlacer_v5_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_deinterlacer_v5_1_0 +v_demosaic_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_demosaic_v1_1_5 +v_frmbuf_rd_v2_2_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_frmbuf_rd_v2_2_5 +v_frmbuf_wr_v2_2_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_frmbuf_wr_v2_2_5 +v_gamma_lut_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_gamma_lut_v1_1_5 +v_hcresampler_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hcresampler_v1_1_5 +v_hdmi_phy1_v1_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hdmi_phy1_v1_0_6 +v_hdmi_rx_v3_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hdmi_rx_v3_0_0 +v_hdmi_tx_v3_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hdmi_tx_v3_0_0 +v_hscaler_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hscaler_v1_1_5 +v_letterbox_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_letterbox_v1_1_5 +v_mix_v5_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_mix_v5_1_5 +v_scenechange_v1_1_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_scenechange_v1_1_4 +v_sdi_rx_vid_bridge_v2_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_sdi_rx_vid_bridge_v2_0_0 +v_smpte_sdi_v3_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_smpte_sdi_v3_0_9 +v_smpte_uhdsdi_rx_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_smpte_uhdsdi_rx_v1_0_1 +v_smpte_uhdsdi_tx_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_smpte_uhdsdi_tx_v1_0_1 +v_smpte_uhdsdi_v1_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_smpte_uhdsdi_v1_0_9 +v_tpg_v8_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_tpg_v8_0_9 +v_tpg_v8_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_tpg_v8_1_5 +v_tpg_v8_2_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_tpg_v8_2_1 +v_uhdsdi_audio_v2_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_uhdsdi_audio_v2_0_6 +v_uhdsdi_vidgen_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_uhdsdi_vidgen_v1_0_1 +v_vcresampler_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_vcresampler_v1_1_5 +v_vid_in_axi4s_v4_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_vid_in_axi4s_v4_0_9 +v_vid_in_axi4s_v5_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_vid_in_axi4s_v5_0_1 +v_vscaler_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_vscaler_v1_1_5 +v_warp_filter_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_warp_filter_v1_0_2 +v_warp_init_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_warp_init_v1_0_2 +xbip_dsp48_wrapper_v3_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_dsp48_wrapper_v3_0_4 +xbip_utils_v3_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_utils_v3_0_10 +xdfe_nlf_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_nlf_v1_0_0 +xdfe_resampler_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_resampler_v1_0_4 +xdma_v4_1_17 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdma_v4_1_17 +xlconcat_v2_1_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xlconcat_v2_1_4 +xlconstant_v1_1_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xlconstant_v1_1_7 +xlslice_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xlslice_v1_0_2 +xpm_cdc_gen_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xpm_cdc_gen_v1_0_1 +xsdbm_v3_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xsdbm_v3_0_0 +xxv_ethernet_v4_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xxv_ethernet_v4_1_0 +aurora_8b10b_versal_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/aurora_8b10b_versal_v1_0_1 +axi_c2c_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_c2c_v1_0_3 +lib_srl_fifo_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lib_srl_fifo_v1_0_2 +lib_fifo_v1_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lib_fifo_v1_0_16 +axi_datamover_v5_1_28 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_datamover_v5_1_28 +amm_axi_bridge_v1_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/amm_axi_bridge_v1_0_12 +axis_register_slice_v1_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_register_slice_v1_1_26 +axis_switch_v1_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_switch_v1_1_26 +axis_clock_converter_v1_1_27 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_clock_converter_v1_1_27 +axis_data_fifo_v2_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_data_fifo_v2_0_8 +ats_switch_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ats_switch_v1_0_5 +audio_formatter_v1_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/audio_formatter_v1_0_8 +axi4stream_vip_v1_1_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi4stream_vip_v1_1_12 +v_tc_v6_2_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_tc_v6_2_4 +v_dp_axi4s_vid_out_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_dp_axi4s_vid_out_v1_0_4 +v_tc_v6_1_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_tc_v6_1_13 +v_axi4s_vid_out_v4_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_axi4s_vid_out_v4_0_14 +axi4svideo_bridge_v1_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi4svideo_bridge_v1_0_14 +axis_accelerator_adapter_v2_1_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_accelerator_adapter_v2_1_16 +axis_broadcaster_v1_1_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_broadcaster_v1_1_25 +axis_combiner_v1_1_24 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_combiner_v1_1_24 +axis_data_fifo_v1_1_27 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_data_fifo_v1_1_27 +axis_dwidth_converter_v1_1_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_dwidth_converter_v1_1_25 +axis_ila_intf_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_ila_intf_v1_0_0 +axis_interconnect_v1_1_20 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_interconnect_v1_1_20 +axis_subset_converter_v1_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_subset_converter_v1_1_26 +axis_vio_v1_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axis_vio_v1_0_6 +axi_apb_bridge_v3_0_17 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_apb_bridge_v3_0_17 +axi_bram_ctrl_v4_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_bram_ctrl_v4_0_14 +axi_sg_v4_1_15 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_sg_v4_1_15 +axi_cdma_v4_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_cdma_v4_1_26 +axi_clock_converter_v2_1_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_clock_converter_v2_1_25 +axi_data_fifo_v2_1_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_data_fifo_v2_1_25 +axi_register_slice_v2_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_register_slice_v2_1_26 +axi_crossbar_v2_1_27 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_crossbar_v2_1_27 +axi_dma_v7_1_27 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_dma_v7_1_27 +axi_protocol_converter_v2_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_protocol_converter_v2_1_26 +axi_dwidth_converter_v2_1_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_dwidth_converter_v2_1_26 +axi_emc_v3_0_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_emc_v3_0_26 +axi_epc_v2_0_29 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_epc_v2_0_29 +lib_bmg_v1_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lib_bmg_v1_0_14 +axi_ethernetlite_v3_0_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_ethernetlite_v3_0_25 +axi_ethernet_buffer_v2_0_24 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_ethernet_buffer_v2_0_24 +axi_fifo_mm_s_v4_2_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_fifo_mm_s_v4_2_8 +axi_firewall_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_firewall_v1_1_5 +axi_firewall_v1_2_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_firewall_v1_2_1 +interrupt_control_v3_1_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/interrupt_control_v3_1_4 +axi_gpio_v2_0_28 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_gpio_v2_0_28 +axi_hbicap_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_hbicap_v1_0_4 +axi_hwicap_v3_0_30 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_hwicap_v3_0_30 +axi_iic_v2_1_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_iic_v2_1_2 +axi_intc_v4_1_17 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_intc_v4_1_17 +axi_interconnect_v1_7_20 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_interconnect_v1_7_20 +axi_master_burst_v2_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_master_burst_v2_0_7 +axi_msg_v1_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_msg_v1_0_8 +axi_mcdma_v1_1_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_mcdma_v1_1_7 +axi_memory_init_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_memory_init_v1_0_7 +axi_mm2s_mapper_v1_1_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_mm2s_mapper_v1_1_25 +axi_mmu_v2_1_24 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_mmu_v2_1_24 +axi_pcie_v2_9_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_pcie_v2_9_7 +axi_protocol_checker_v2_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_protocol_checker_v2_0_12 +axi_quad_spi_v3_2_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_quad_spi_v3_2_25 +axi_sideband_util_v1_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_sideband_util_v1_0_10 +axi_tft_v2_0_25 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_tft_v2_0_25 +axi_timebase_wdt_v3_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_timebase_wdt_v3_0_18 +axi_timer_v2_0_28 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_timer_v2_0_28 +axi_traffic_gen_v3_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_traffic_gen_v3_0_12 +axi_uart16550_v2_0_28 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_uart16550_v2_0_28 +axi_uartlite_v2_0_30 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_uartlite_v2_0_30 +axi_usb2_device_v5_0_27 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_usb2_device_v5_0_27 +axi_utils_v2_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_utils_v2_0_6 +axi_vdma_v6_3_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_vdma_v6_3_14 +xbip_pipe_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_pipe_v3_0_6 +xbip_dsp48_addsub_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_dsp48_addsub_v3_0_6 +xbip_addsub_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_addsub_v3_0_6 +c_reg_fd_v12_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_reg_fd_v12_0_6 +c_addsub_v12_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_addsub_v12_0_14 +axi_vfifo_ctrl_v2_0_28 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_vfifo_ctrl_v2_0_28 +axi_vip_v1_1_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_vip_v1_1_12 +bs_switch_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/bs_switch_v1_0_0 +canfd_v3_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/canfd_v3_0_5 +can_v5_0_29 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/can_v5_0_29 +cic_compiler_v4_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cic_compiler_v4_0_16 +xbip_bram18k_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_bram18k_v3_0_6 +mult_gen_v12_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mult_gen_v12_0_18 +cmpy_v6_0_21 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cmpy_v6_0_21 +c_mux_bit_v12_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_mux_bit_v12_0_6 +c_shift_ram_v12_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_shift_ram_v12_0_14 +c_mux_bus_v12_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_mux_bus_v12_0_6 +c_gate_bit_v12_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_gate_bit_v12_0_6 +xbip_counter_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_counter_v3_0_6 +c_counter_binary_v12_0_15 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_counter_binary_v12_0_15 +c_compare_v12_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_compare_v12_0_6 +convolution_v9_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/convolution_v9_0_16 +cordic_v6_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cordic_v6_0_18 +cpri_v8_11_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/cpri_v8_11_12 +xbip_dsp48_acc_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_dsp48_acc_v3_0_6 +xbip_accum_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_accum_v3_0_6 +c_accum_v12_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/c_accum_v12_0_14 +dbg_intf = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dbg_intf +xbip_dsp48_multadd_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_dsp48_multadd_v3_0_6 +dds_compiler_v6_0_22 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dds_compiler_v6_0_22 +dft_v4_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dft_v4_0_16 +dft_v4_2_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dft_v4_2_3 +dfx_axi_shutdown_manager_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dfx_axi_shutdown_manager_v1_0_0 +dfx_bitstream_monitor_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dfx_bitstream_monitor_v1_0_1 +dfx_controller_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dfx_controller_v1_0_3 +dfx_decoupler_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dfx_decoupler_v1_0_4 +displayport_v7_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/displayport_v7_0_0 +displayport_v9_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/displayport_v9_0_5 +xbip_dsp48_mult_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_dsp48_mult_v3_0_6 +floating_point_v7_0_20 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/floating_point_v7_0_20 +div_gen_v5_1_19 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/div_gen_v5_1_19 +dsp_macro_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/dsp_macro_v1_0_2 +ernic_v3_1_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ernic_v3_1_2 +etrnic_v1_1_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/etrnic_v1_1_5 +fc32_rs_fec_v1_0_21 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fc32_rs_fec_v1_0_21 +fec_5g_common_v1_1_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fec_5g_common_v1_1_1 +fir_compiler_v5_2_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fir_compiler_v5_2_6 +fir_compiler_v7_2_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/fir_compiler_v7_2_18 +flexo_100g_rs_fec_v1_0_21 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/flexo_100g_rs_fec_v1_0_21 +floating_point_v7_1_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/floating_point_v7_1_14 +g709_rs_encoder_v2_2_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/g709_rs_encoder_v2_2_8 +rs_toolbox_v9_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rs_toolbox_v9_0_9 +g709_rs_decoder_v2_2_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/g709_rs_decoder_v2_2_10 +g709_fec_v2_4_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/g709_fec_v2_4_5 +g975_efec_i4_v1_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/g975_efec_i4_v1_0_18 +g975_efec_i7_v2_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/g975_efec_i7_v2_0_18 +hw_trace = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/hw_trace +icap_arb_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/icap_arb_v1_0_1 +ieee802d3_200g_rs_fec_v2_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_200g_rs_fec_v2_0_5 +ieee802d3_25g_rs_fec_v1_0_23 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_25g_rs_fec_v1_0_23 +ieee802d3_400g_rs_fec_v2_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_400g_rs_fec_v2_0_7 +ieee802d3_50g_rs_fec_v1_0_19 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_50g_rs_fec_v1_0_19 +ieee802d3_50g_rs_fec_v2_0_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_50g_rs_fec_v2_0_11 +ieee802d3_rs_fec_v2_0_15 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ieee802d3_rs_fec_v2_0_15 +ldpc_v2_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/ldpc_v2_0_10 +xfft_v7_2_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xfft_v7_2_13 +lte_fft_v2_0_22 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lte_fft_v2_0_22 +xfft_v9_1_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xfft_v9_1_8 +lte_fft_v2_1_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lte_fft_v2_1_6 +mailbox_v2_1_15 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mailbox_v2_1_15 +mdm_v3_2_23 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mdm_v3_2_23 +mem_tg_v1_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mem_tg_v1_0_8 +iomodule_v3_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/iomodule_v3_0 +lmb_bram_if_cntlr_v4_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lmb_bram_if_cntlr_v4_0 +lmb_v10_v3_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/lmb_v10_v3_0 +axi_lite_ipif_v3_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/axi_lite_ipif_v3_0 +mdm_v3_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/mdm_v3_2 +microblaze_mcs_v2_3_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/microblaze_mcs_v2_3_6 +perf_axi_tg_v1_0_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/perf_axi_tg_v1_0_8 +polar_v1_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/polar_v1_0_10 +polar_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/polar_v1_1_0 +processing_system7_vip_v1_0_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/processing_system7_vip_v1_0_14 +proc_sys_reset_v5_0_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/proc_sys_reset_v5_0_13 +pr_decoupler_v1_0_10 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/pr_decoupler_v1_0_10 +qdriv_pl_phy_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/qdriv_pl_phy_v1_0_0 +quadsgmii_v3_5_8 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/quadsgmii_v3_5_8 +rs_decoder_v9_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rs_decoder_v9_0_18 +rs_encoder_v9_0_17 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/rs_encoder_v9_0_17 +sd_fec_v1_1_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sd_fec_v1_1_9 +shell_utils_addr_remap_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/shell_utils_addr_remap_v1_0_5 +sid_v8_0_17 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/sid_v8_0_17 +soft_ecc_proxy_v1_0_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/soft_ecc_proxy_v1_0_1 +spdif_v2_0_26 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/spdif_v2_0_26 +srio_gen2_v4_1_14 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/srio_gen2_v4_1_14 +switch_core_top_v1_0_11 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/switch_core_top_v1_0_11 +tcc_decoder_3gppmm_v2_0_23 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tcc_decoder_3gppmm_v2_0_23 +tcc_encoder_3gpplte_v4_0_16 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tcc_encoder_3gpplte_v4_0_16 +tcc_encoder_3gpp_v5_0_18 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tcc_encoder_3gpp_v5_0_18 +tmr_comparator_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tmr_comparator_v1_0_5 +tmr_sem_v1_0_22 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tmr_sem_v1_0_22 +tri_mode_ethernet_mac_v9_0_22 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tri_mode_ethernet_mac_v9_0_22 +tsn_temac_v1_0_7 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/tsn_temac_v1_0_7 +vby1hs_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/vby1hs_v1_0_2 +versal_cips_ps_vip_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/versal_cips_ps_vip_v1_0_4 +videoaxi4s_bridge_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/videoaxi4s_bridge_v1_0_5 +viterbi_v9_1_13 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/viterbi_v9_1_13 +v_dual_splitter_v1_0_9 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_dual_splitter_v1_0_9 +v_frmbuf_rd_v2_3_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_frmbuf_rd_v2_3_1 +v_frmbuf_rd_v2_4_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_frmbuf_rd_v2_4_0 +v_frmbuf_wr_v2_3_1 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_frmbuf_wr_v2_3_1 +v_frmbuf_wr_v2_4_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_frmbuf_wr_v2_4_0 +v_hdmi_rx1_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hdmi_rx1_v1_0_3 +v_hdmi_tx1_v1_0_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_hdmi_tx1_v1_0_3 +v_mix_v5_2_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_mix_v5_2_3 +v_multi_scaler_v1_2_3 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_multi_scaler_v1_2_3 +v_vid_gt_bridge_v1_0_5 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_vid_gt_bridge_v1_0_5 +v_vid_sdi_tx_bridge_v2_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_vid_sdi_tx_bridge_v2_0_0 +v_warp_filter_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_warp_filter_v1_1_0 +v_warp_init_v1_1_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/v_warp_init_v1_1_0 +xbip_dsp48_multacc_v3_0_6 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_dsp48_multacc_v3_0_6 +xbip_multadd_v3_0_17 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xbip_multadd_v3_0_17 +xdfe_common_v1_0_0 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_common_v1_0_0 +xdfe_cc_filter_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_cc_filter_v1_0_4 +xdfe_cc_mixer_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_cc_mixer_v1_0_4 +xdfe_equalizer_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_equalizer_v1_0_4 +xdfe_fft_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_fft_v1_0_4 +xdfe_nr_prach_v1_0_4 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xdfe_nr_prach_v1_0_4 +xsdbs_v1_0_2 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/xsdbs_v1_0_2 +zynq_ultra_ps_e_vip_v1_0_12 = C:/Users/yuhc2/AppData/Roaming/Xilinx/Vivado/modelsim_simlib/zynq_ultra_ps_e_vip_v1_0_12 [vcom] ; VHDL93 variable selects language version as the default. ; Default is VHDL-2002. diff --git a/tools/sim/transcript b/tools/sim/transcript deleted file mode 100644 index 0835fcc..0000000 --- a/tools/sim/transcript +++ /dev/null @@ -1,1788 +0,0 @@ -# Reading D:/intelFPGA_lite/17.0/modelsim_ase/tcl/vsim/pref.tcl -# do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:19:40 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling entity bram_waveform -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_waveform -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# -- Compiling entity fifo_data_to_stream -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of fifo_data_to_stream -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity fifo_data_to_stream -# -- Loading package STANDARD -# End time: 02:19:43 on Mar 05,2024, Elapsed time: 0:00:03 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:19:43 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/qlaser_dac_dc_pkg.vhd ../../src/hdl/pkg/qlaser_dacs_pulse_channel_pkg.vhd ../../src/hdl/pkg/qlaser_pkg.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package qlaser_dac_dc_pkg -# -- Compiling package qlaser_dacs_pulse_channel_pkg -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Compiling package qlaser_pkg -# -- Compiling package body qlaser_pkg -# -- Loading package qlaser_pkg -# End time: 02:19:43 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:19:43 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakp.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(984): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(986): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1010): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1012): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1042): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1085): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1182): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1207): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1231): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1254): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1276): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1296): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1315): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1333): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1350): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1366): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1381): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1395): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1408): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1420): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1431): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1441): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1450): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1458): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1465): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1471): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1525): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1551): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1575): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1598): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1620): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1641): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1661): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1680): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1698): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1715): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1731): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1746): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1760): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1773): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1785): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1796): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1806): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1815): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1823): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1830): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2194): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2221): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2257): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2290): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2322): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2351): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2387): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2424): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2456): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:19:43 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 56 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:19:43 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakb.vhd -# -- Loading package STANDARD -# -- Compiling package body std_iopak -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(1203): (vcom-1135) Subprogram parameter asc_file is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4397): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4399): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4431): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4433): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4473): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4636): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4971): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5005): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5135): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5392): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5423): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5454): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5485): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5516): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5578): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5610): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5642): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5674): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5707): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5739): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5771): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5803): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5835): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5867): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5899): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5931): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5963): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6018): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6066): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6130): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6382): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6415): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6448): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6481): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6514): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6580): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6613): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6646): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6679): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6712): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6745): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6778): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6811): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6844): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6877): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6910): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6946): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6979): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8059): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8103): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8159): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8224): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8285): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8344): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8404): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8444): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8529): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:19:44 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 61 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:19:44 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/modules/qlaser_dacs_pulse_channel.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity qlaser_dacs_pulse_channel -# -- Compiling architecture channel of qlaser_dacs_pulse_channel -# -- Loading entity bram_pulse_definition -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# End time: 02:19:45 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:19:45 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/tb/poly_gen_nonsynth.vhdl ../../src/hdl/tb/qlaser_dacs_pulse_tb.vhdl ../../src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl ../../src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package MATH_REAL -# -- Loading package std_iopak -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity poly_gen -# -- Compiling architecture nonsynth of poly_gen -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading entity qlaser_dacs_pulse_channel -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package std_logic_textio -# -- Compiling entity tb_pulse_channel_random_polynomials -# -- Compiling architecture verify of tb_pulse_channel_random_polynomials -# End time: 02:19:45 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# vsim -voptargs=""+acc"" -lib work tb_pulse_channel_random_polynomials -# Start time: 02:19:45 on Mar 05,2024 -# Loading std.standard -# Loading std.textio(body) -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading ieee.std_logic_textio(body) -# Loading ieee.math_real(body) -# Loading work.std_iopak(body) -# Loading work.qlaser_dacs_pulse_channel_pkg -# Loading work.qlaser_dac_dc_pkg -# Loading work.qlaser_pkg(body) -# Loading work.tb_pulse_channel_random_polynomials(verify) -# Loading work.qlaser_dacs_pulse_channel(channel) -# Loading work.bram_pulse_definition(structure) -# Loading unisim.gnd(gnd_v) -# Loading ieee.vital_timing(body) -# Loading ieee.vital_primitives(body) -# Loading unisim.vpkg(body) -# Loading unisim.ramb36e2(ramb36e2_v) -# Loading work.bram_waveform(structure) -# ** Warning: Design size of 19434 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity. -# Expect performance to be adversely affected. -# .main_pane.wave.interior.cs.body.pw.wf -# .main_pane.structure.interior.cs.body.struct -# .main_pane.objects.interior.cs.body.tree -# Simulation start -# Simulation done -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:01 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# ** Error: ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl(139): near "STD": Identifier may not contain non-graphic character. -# ** Error: ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl(139): (vcom-1136) Unknown identifier "". -# ** Error: ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl(389): (vcom-1136) Unknown identifier "". -# ** Error: ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl(389): (vcom-1454) Formal "" of mode cannot be associated with an expression. -# ** Error: ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl(412): VHDL Compiler exiting -# End time: 02:21:03 on Mar 05,2024, Elapsed time: 0:00:02 -# Errors: 5, Warnings: 0 -# ** Error: D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# Error in macro ./compile.do line 3 -# D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# while executing -# "vcom ../../src/hdl/ip_gen/*.vhd*" -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:18 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(3081): near ".": syntax error -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(3090): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(417): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(419): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(421): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(423): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(425): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(427): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(429): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(431): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(433): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(435): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(437): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(439): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(441): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(443): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(445): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(447): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(449): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(451): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(453): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(455): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(457): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(459): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(461): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(463): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(465): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(467): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(469): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(471): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(473): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(475): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(477): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(479): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(481): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(483): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(485): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(487): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(489): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(491): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(493): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(495): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(497): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(499): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(501): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(503): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(505): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(507): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(509): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(512): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(531): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(541): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(551): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(561): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(571): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(581): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(591): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(601): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(611): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(621): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(631): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(641): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(651): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(661): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(671): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(681): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(691): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(701): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(711): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(721): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(731): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(741): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(751): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(761): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(771): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(781): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(791): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(801): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(811): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(821): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(831): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(841): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(851): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(861): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(871): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(881): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(891): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(901): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(911): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(921): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(931): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(941): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(951): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(961): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(971): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(981): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(991): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1001): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1011): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1021): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1031): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1041): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1051): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1061): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1071): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1081): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1091): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1101): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1111): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1121): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1131): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1141): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1151): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1161): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1171): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1181): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1191): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1201): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1211): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1221): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1231): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1241): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1251): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1261): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1271): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1281): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1291): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1301): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1311): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1321): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1331): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1341): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1351): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1361): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1371): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1381): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1391): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1401): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1411): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1421): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1431): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1441): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1451): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1461): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1471): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(5612): VHDL Compiler exiting -# End time: 02:21:19 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 147, Warnings: 0 -# ** Error: D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# Error in macro ./compile.do line 3 -# D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# while executing -# "vcom ../../src/hdl/ip_gen/*.vhd*" -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:21 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(822): in protected region -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(944): near "attribute": syntax error -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(974): near "¤": (vcom-1576) . -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(974): near "": illegal character found in source -# ** Error (suppressible): ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl(1): (vcom-1491) Empty source files. -# ** Error: ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl(1): near "": illegal character found in source -# ** Error: ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl(1): VHDL Compiler exiting -# End time: 02:21:23 on Mar 05,2024, Elapsed time: 0:00:02 -# Errors: 8, Warnings: 0 -# ** Error: D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# Error in macro ./compile.do line 3 -# D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# while executing -# "vcom ../../src/hdl/ip_gen/*.vhd*" -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:24 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# ** Error: ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl(122): near "îport": (vcom-1576) . -# ** Error: ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl(1): VHDL Compiler exiting -# End time: 02:21:24 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 2, Warnings: 0 -# ** Error: D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# Error in macro ./compile.do line 3 -# D:/intelFPGA_lite/17.0/modelsim_ase/win32aloem/vcom failed. -# while executing -# "vcom ../../src/hdl/ip_gen/*.vhd*" -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:25 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling entity bram_waveform -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_waveform -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# -- Compiling entity fifo_data_to_stream -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of fifo_data_to_stream -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity fifo_data_to_stream -# -- Loading package STANDARD -# End time: 02:21:28 on Mar 05,2024, Elapsed time: 0:00:03 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:28 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/qlaser_dac_dc_pkg.vhd ../../src/hdl/pkg/qlaser_dacs_pulse_channel_pkg.vhd ../../src/hdl/pkg/qlaser_pkg.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package qlaser_dac_dc_pkg -# -- Compiling package qlaser_dacs_pulse_channel_pkg -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Compiling package qlaser_pkg -# -- Compiling package body qlaser_pkg -# -- Loading package qlaser_pkg -# End time: 02:21:28 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:29 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakp.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(984): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(986): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1010): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1012): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1042): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1085): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1182): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1207): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1231): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1254): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1276): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1296): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1315): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1333): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1350): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1366): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1381): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1395): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1408): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1420): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1431): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1441): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1450): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1458): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1465): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1471): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1525): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1551): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1575): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1598): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1620): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1641): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1661): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1680): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1698): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1715): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1731): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1746): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1760): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1773): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1785): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1796): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1806): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1815): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1823): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1830): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2194): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2221): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2257): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2290): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2322): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2351): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2387): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2424): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2456): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:21:29 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 56 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:29 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakb.vhd -# -- Loading package STANDARD -# -- Compiling package body std_iopak -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(1203): (vcom-1135) Subprogram parameter asc_file is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4397): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4399): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4431): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4433): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4473): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4636): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4971): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5005): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5135): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5392): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5423): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5454): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5485): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5516): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5578): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5610): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5642): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5674): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5707): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5739): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5771): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5803): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5835): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5867): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5899): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5931): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5963): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6018): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6066): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6130): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6382): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6415): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6448): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6481): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6514): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6580): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6613): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6646): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6679): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6712): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6745): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6778): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6811): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6844): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6877): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6910): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6946): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6979): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8059): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8103): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8159): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8224): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8285): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8344): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8404): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8444): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8529): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:21:29 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 61 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:30 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/modules/qlaser_dacs_pulse_channel.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity qlaser_dacs_pulse_channel -# -- Compiling architecture channel of qlaser_dacs_pulse_channel -# -- Loading entity bram_pulse_definition -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# End time: 02:21:30 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:21:30 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/tb/poly_gen_nonsynth.vhdl ../../src/hdl/tb/qlaser_dacs_pulse_tb.vhdl ../../src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl ../../src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package MATH_REAL -# -- Loading package std_iopak -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity poly_gen -# -- Compiling architecture nonsynth of poly_gen -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading entity qlaser_dacs_pulse_channel -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package std_logic_textio -# -- Compiling entity tb_pulse_channel_random_polynomials -# -- Compiling architecture verify of tb_pulse_channel_random_polynomials -# End time: 02:21:30 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# End time: 02:21:32 on Mar 05,2024, Elapsed time: 0:01:47 -# Errors: 171, Warnings: 118 -# vsim -voptargs=""+acc"" -lib work tb_pulse_channel_random_polynomials -# Start time: 02:21:32 on Mar 05,2024 -# Loading std.standard -# Loading std.textio(body) -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading ieee.std_logic_textio(body) -# Loading ieee.math_real(body) -# Loading work.std_iopak(body) -# Loading work.qlaser_dacs_pulse_channel_pkg -# Loading work.qlaser_dac_dc_pkg -# Loading work.qlaser_pkg(body) -# Loading work.tb_pulse_channel_random_polynomials(verify) -# Loading work.qlaser_dacs_pulse_channel(channel) -# Loading work.bram_pulse_definition(structure) -# Loading unisim.gnd(gnd_v) -# Loading ieee.vital_timing(body) -# Loading ieee.vital_primitives(body) -# Loading unisim.vpkg(body) -# Loading unisim.ramb36e2(ramb36e2_v) -# Loading work.bram_waveform(structure) -# ** Warning: Design size of 19434 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity. -# Expect performance to be adversely affected. -# .main_pane.wave.interior.cs.body.pw.wf -# .main_pane.structure.interior.cs.body.struct -# .main_pane.objects.interior.cs.body.tree -# Simulation start -# Simulation done -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:22:32 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling entity bram_waveform -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_waveform -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# -- Compiling entity fifo_data_to_stream -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of fifo_data_to_stream -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity fifo_data_to_stream -# -- Loading package STANDARD -# End time: 02:22:35 on Mar 05,2024, Elapsed time: 0:00:03 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:22:35 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/qlaser_dac_dc_pkg.vhd ../../src/hdl/pkg/qlaser_dacs_pulse_channel_pkg.vhd ../../src/hdl/pkg/qlaser_pkg.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package qlaser_dac_dc_pkg -# -- Compiling package qlaser_dacs_pulse_channel_pkg -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Compiling package qlaser_pkg -# -- Compiling package body qlaser_pkg -# -- Loading package qlaser_pkg -# End time: 02:22:35 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:22:35 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakp.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(984): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(986): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1010): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1012): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1042): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1085): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1182): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1207): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1231): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1254): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1276): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1296): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1315): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1333): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1350): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1366): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1381): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1395): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1408): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1420): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1431): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1441): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1450): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1458): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1465): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1471): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1525): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1551): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1575): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1598): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1620): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1641): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1661): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1680): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1698): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1715): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1731): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1746): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1760): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1773): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1785): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1796): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1806): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1815): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1823): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1830): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2194): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2221): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2257): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2290): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2322): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2351): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2387): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2424): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2456): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:22:36 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 56 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:22:36 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakb.vhd -# -- Loading package STANDARD -# -- Compiling package body std_iopak -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(1203): (vcom-1135) Subprogram parameter asc_file is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4397): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4399): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4431): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4433): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4473): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4636): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4971): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5005): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5135): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5392): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5423): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5454): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5485): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5516): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5578): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5610): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5642): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5674): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5707): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5739): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5771): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5803): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5835): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5867): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5899): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5931): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5963): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6018): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6066): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6130): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6382): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6415): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6448): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6481): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6514): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6580): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6613): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6646): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6679): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6712): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6745): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6778): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6811): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6844): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6877): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6910): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6946): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6979): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8059): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8103): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8159): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8224): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8285): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8344): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8404): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8444): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8529): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:22:36 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 61 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:22:36 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/modules/qlaser_dacs_pulse_channel.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity qlaser_dacs_pulse_channel -# -- Compiling architecture channel of qlaser_dacs_pulse_channel -# -- Loading entity bram_pulse_definition -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# End time: 02:22:37 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:22:37 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/tb/poly_gen_nonsynth.vhdl ../../src/hdl/tb/qlaser_dacs_pulse_tb.vhdl ../../src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl ../../src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package MATH_REAL -# -- Loading package std_iopak -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity poly_gen -# -- Compiling architecture nonsynth of poly_gen -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading entity qlaser_dacs_pulse_channel -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package std_logic_textio -# -- Compiling entity tb_pulse_channel_random_polynomials -# -- Compiling architecture verify of tb_pulse_channel_random_polynomials -# End time: 02:22:37 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# End time: 02:22:39 on Mar 05,2024, Elapsed time: 0:01:07 -# Errors: 0, Warnings: 118 -# vsim -voptargs=""+acc"" -lib work tb_pulse_channel_random_polynomials -# Start time: 02:22:39 on Mar 05,2024 -# Loading std.standard -# Loading std.textio(body) -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading ieee.std_logic_textio(body) -# Loading ieee.math_real(body) -# Loading work.std_iopak(body) -# Loading work.qlaser_dacs_pulse_channel_pkg -# Loading work.qlaser_dac_dc_pkg -# Loading work.qlaser_pkg(body) -# Loading work.tb_pulse_channel_random_polynomials(verify) -# Loading work.qlaser_dacs_pulse_channel(channel) -# Loading work.bram_pulse_definition(structure) -# Loading unisim.gnd(gnd_v) -# Loading ieee.vital_timing(body) -# Loading ieee.vital_primitives(body) -# Loading unisim.vpkg(body) -# Loading unisim.ramb36e2(ramb36e2_v) -# Loading work.bram_waveform(structure) -# ** Warning: Design size of 19437 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity. -# Expect performance to be adversely affected. -# .main_pane.wave.interior.cs.body.pw.wf -# .main_pane.structure.interior.cs.body.struct -# .main_pane.objects.interior.cs.body.tree -# Simulation start -# Simulation done -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:23:15 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling entity bram_waveform -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_waveform -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# -- Compiling entity fifo_data_to_stream -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of fifo_data_to_stream -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity fifo_data_to_stream -# -- Loading package STANDARD -# End time: 02:23:19 on Mar 05,2024, Elapsed time: 0:00:04 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:23:19 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/qlaser_dac_dc_pkg.vhd ../../src/hdl/pkg/qlaser_dacs_pulse_channel_pkg.vhd ../../src/hdl/pkg/qlaser_pkg.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package qlaser_dac_dc_pkg -# -- Compiling package qlaser_dacs_pulse_channel_pkg -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Compiling package qlaser_pkg -# -- Compiling package body qlaser_pkg -# -- Loading package qlaser_pkg -# End time: 02:23:19 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:23:19 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakp.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(984): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(986): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1010): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1012): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1042): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1085): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1182): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1207): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1231): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1254): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1276): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1296): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1315): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1333): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1350): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1366): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1381): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1395): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1408): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1420): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1431): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1441): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1450): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1458): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1465): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1471): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1525): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1551): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1575): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1598): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1620): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1641): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1661): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1680): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1698): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1715): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1731): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1746): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1760): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1773): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1785): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1796): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1806): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1815): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1823): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1830): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2194): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2221): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2257): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2290): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2322): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2351): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2387): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2424): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2456): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:23:19 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 56 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:23:19 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakb.vhd -# -- Loading package STANDARD -# -- Compiling package body std_iopak -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(1203): (vcom-1135) Subprogram parameter asc_file is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4397): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4399): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4431): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4433): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4473): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4636): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4971): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5005): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5135): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5392): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5423): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5454): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5485): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5516): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5578): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5610): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5642): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5674): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5707): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5739): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5771): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5803): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5835): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5867): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5899): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5931): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5963): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6018): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6066): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6130): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6382): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6415): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6448): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6481): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6514): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6580): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6613): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6646): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6679): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6712): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6745): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6778): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6811): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6844): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6877): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6910): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6946): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6979): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8059): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8103): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8159): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8224): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8285): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8344): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8404): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8444): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8529): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:23:20 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 61 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:23:20 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/modules/qlaser_dacs_pulse_channel.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity qlaser_dacs_pulse_channel -# -- Compiling architecture channel of qlaser_dacs_pulse_channel -# -- Loading entity bram_pulse_definition -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# End time: 02:23:21 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:23:21 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/tb/poly_gen_nonsynth.vhdl ../../src/hdl/tb/qlaser_dacs_pulse_tb.vhdl ../../src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl ../../src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package MATH_REAL -# -- Loading package std_iopak -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity poly_gen -# -- Compiling architecture nonsynth of poly_gen -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading entity qlaser_dacs_pulse_channel -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package std_logic_textio -# -- Compiling entity tb_pulse_channel_random_polynomials -# -- Compiling architecture verify of tb_pulse_channel_random_polynomials -# End time: 02:23:21 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# End time: 02:23:22 on Mar 05,2024, Elapsed time: 0:00:43 -# Errors: 0, Warnings: 118 -# vsim -voptargs=""+acc"" -lib work tb_pulse_channel_random_polynomials -# Start time: 02:23:22 on Mar 05,2024 -# Loading std.standard -# Loading std.textio(body) -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading ieee.std_logic_textio(body) -# Loading ieee.math_real(body) -# Loading work.std_iopak(body) -# Loading work.qlaser_dacs_pulse_channel_pkg -# Loading work.qlaser_dac_dc_pkg -# Loading work.qlaser_pkg(body) -# Loading work.tb_pulse_channel_random_polynomials(verify) -# Loading work.qlaser_dacs_pulse_channel(channel) -# Loading work.bram_pulse_definition(structure) -# Loading unisim.gnd(gnd_v) -# Loading ieee.vital_timing(body) -# Loading ieee.vital_primitives(body) -# Loading unisim.vpkg(body) -# Loading unisim.ramb36e2(ramb36e2_v) -# Loading work.bram_waveform(structure) -# ** Warning: Design size of 19437 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity. -# Expect performance to be adversely affected. -# .main_pane.wave.interior.cs.body.pw.wf -# .main_pane.structure.interior.cs.body.struct -# .main_pane.objects.interior.cs.body.tree -# Simulation start -# Simulation done -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:24:09 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling entity bram_waveform -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_waveform -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# -- Compiling entity fifo_data_to_stream -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of fifo_data_to_stream -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity fifo_data_to_stream -# -- Loading package STANDARD -# End time: 02:24:12 on Mar 05,2024, Elapsed time: 0:00:03 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:24:12 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/qlaser_dac_dc_pkg.vhd ../../src/hdl/pkg/qlaser_dacs_pulse_channel_pkg.vhd ../../src/hdl/pkg/qlaser_pkg.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package qlaser_dac_dc_pkg -# -- Compiling package qlaser_dacs_pulse_channel_pkg -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Compiling package qlaser_pkg -# -- Compiling package body qlaser_pkg -# -- Loading package qlaser_pkg -# End time: 02:24:12 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:24:12 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakp.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(984): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(986): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1010): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1012): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1042): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1085): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1182): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1207): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1231): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1254): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1276): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1296): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1315): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1333): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1350): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1366): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1381): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1395): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1408): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1420): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1431): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1441): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1450): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1458): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1465): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1471): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1525): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1551): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1575): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1598): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1620): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1641): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1661): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1680): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1698): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1715): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1731): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1746): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1760): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1773): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1785): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1796): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1806): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1815): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1823): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1830): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2194): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2221): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2257): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2290): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2322): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2351): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2387): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2424): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2456): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:24:12 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 56 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:24:13 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakb.vhd -# -- Loading package STANDARD -# -- Compiling package body std_iopak -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(1203): (vcom-1135) Subprogram parameter asc_file is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4397): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4399): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4431): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4433): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4473): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4636): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4971): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5005): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5135): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5392): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5423): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5454): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5485): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5516): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5578): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5610): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5642): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5674): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5707): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5739): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5771): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5803): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5835): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5867): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5899): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5931): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5963): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6018): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6066): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6130): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6382): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6415): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6448): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6481): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6514): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6580): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6613): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6646): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6679): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6712): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6745): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6778): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6811): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6844): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6877): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6910): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6946): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6979): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8059): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8103): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8159): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8224): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8285): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8344): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8404): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8444): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8529): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:24:13 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 61 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:24:13 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/modules/qlaser_dacs_pulse_channel.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity qlaser_dacs_pulse_channel -# -- Compiling architecture channel of qlaser_dacs_pulse_channel -# -- Loading entity bram_pulse_definition -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# End time: 02:24:14 on Mar 05,2024, Elapsed time: 0:00:01 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:24:14 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/tb/poly_gen_nonsynth.vhdl ../../src/hdl/tb/qlaser_dacs_pulse_tb.vhdl ../../src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl ../../src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package MATH_REAL -# -- Loading package std_iopak -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity poly_gen -# -- Compiling architecture nonsynth of poly_gen -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading entity qlaser_dacs_pulse_channel -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package std_logic_textio -# -- Compiling entity tb_pulse_channel_random_polynomials -# -- Compiling architecture verify of tb_pulse_channel_random_polynomials -# End time: 02:24:14 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# End time: 02:24:15 on Mar 05,2024, Elapsed time: 0:00:53 -# Errors: 0, Warnings: 118 -# vsim -voptargs=""+acc"" -lib work tb_pulse_channel_random_polynomials -# Start time: 02:24:15 on Mar 05,2024 -# Loading std.standard -# Loading std.textio(body) -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading ieee.std_logic_textio(body) -# Loading ieee.math_real(body) -# Loading work.std_iopak(body) -# Loading work.qlaser_dacs_pulse_channel_pkg -# Loading work.qlaser_dac_dc_pkg -# Loading work.qlaser_pkg(body) -# Loading work.tb_pulse_channel_random_polynomials(verify) -# Loading work.qlaser_dacs_pulse_channel(channel) -# Loading work.bram_pulse_definition(structure) -# Loading unisim.gnd(gnd_v) -# Loading ieee.vital_timing(body) -# Loading ieee.vital_primitives(body) -# Loading unisim.vpkg(body) -# Loading unisim.ramb36e2(ramb36e2_v) -# Loading work.bram_waveform(structure) -# ** Warning: Design size of 19437 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity. -# Expect performance to be adversely affected. -# .main_pane.wave.interior.cs.body.pw.wf -# .main_pane.structure.interior.cs.body.struct -# .main_pane.objects.interior.cs.body.tree -# Simulation start -# Simulation done -do run.do -# ** Warning: (vlib-34) Library already exists at "work". -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:25:48 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl ../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl ../../src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl -# -- Loading package STANDARD -# -- Compiling entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulse_definition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulse_definition -# -- Loading package STANDARD -# -- Compiling entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_pulseposition -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_pulseposition -# -- Loading package STANDARD -# -- Compiling entity bram_waveform -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of bram_waveform -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# -- Compiling entity fifo_data_to_stream -# -- Loading package STANDARD -# -- Compiling architecture STRUCTURE of fifo_data_to_stream -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading entity fifo_data_to_stream -# -- Loading package STANDARD -# End time: 02:25:51 on Mar 05,2024, Elapsed time: 0:00:03 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:25:52 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/qlaser_dac_dc_pkg.vhd ../../src/hdl/pkg/qlaser_dacs_pulse_channel_pkg.vhd ../../src/hdl/pkg/qlaser_pkg.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package qlaser_dac_dc_pkg -# -- Compiling package qlaser_dacs_pulse_channel_pkg -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Compiling package qlaser_pkg -# -- Compiling package body qlaser_pkg -# -- Loading package qlaser_pkg -# End time: 02:25:52 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:25:52 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakp.vhd -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Compiling package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(984): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(986): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1010): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1012): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1042): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1085): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1182): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1207): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1231): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1254): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1276): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1296): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1315): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1333): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1350): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1366): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1381): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1395): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1408): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1420): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1431): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1441): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1450): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1458): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1465): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1471): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1525): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1551): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1575): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1598): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1620): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1641): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1661): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1680): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1698): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1715): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1731): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1746): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1760): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1773): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1785): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1796): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1806): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1815): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1823): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(1830): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2194): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2221): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2257): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2290): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2322): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2351): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2387): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2424): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2456): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakp.vhd(2486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:25:52 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 56 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:25:52 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/pkg/iopakb.vhd -# -- Loading package STANDARD -# -- Compiling package body std_iopak -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package std_iopak -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(1203): (vcom-1135) Subprogram parameter asc_file is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4397): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4399): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4431): (vcom-1135) Subprogram parameter in_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4433): (vcom-1135) Subprogram parameter out_fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4473): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4636): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(4971): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5005): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5135): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5392): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5423): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5454): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5485): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5516): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5578): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5610): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5642): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5674): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5707): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5739): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5771): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5803): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5835): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5867): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5899): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5931): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(5963): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6018): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6066): (vcom-1135) Subprogram parameter fptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6130): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6382): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6415): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6448): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6481): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6514): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6547): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6580): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6613): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6646): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6679): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6712): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6745): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6778): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6811): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6844): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6877): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6910): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6946): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(6979): (vcom-1135) Subprogram parameter file_ptr is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8059): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8103): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8159): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8224): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8285): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8344): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8404): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8444): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8486): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# ** Warning: ../../src/hdl/pkg/iopakb.vhd(8529): (vcom-1135) Subprogram parameter stream is declared using VHDL 1987 syntax. -# End time: 02:25:52 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 61 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:25:53 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/modules/qlaser_dacs_pulse_channel.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity qlaser_dacs_pulse_channel -# -- Compiling architecture channel of qlaser_dacs_pulse_channel -# -- Loading entity bram_pulse_definition -# -- Loading entity bram_waveform -# -- Loading package STANDARD -# End time: 02:25:53 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# Model Technology ModelSim - Intel FPGA Edition vcom 10.5b Compiler 2016.10 Oct 5 2016 -# Start time: 02:25:53 on Mar 05,2024 -# vcom -reportprogress 300 ../../src/hdl/tb/poly_gen_nonsynth.vhdl ../../src/hdl/tb/qlaser_dacs_pulse_tb.vhdl ../../src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl ../../src/hdl/tb/tb_pulse_channel_random_polynomials.vhdl -# -- Loading package STANDARD -# -- Loading package TEXTIO -# -- Loading package std_logic_1164 -# -- Loading package NUMERIC_STD -# -- Loading package MATH_REAL -# -- Loading package std_iopak -# -- Loading package qlaser_dacs_pulse_channel_pkg -# -- Compiling entity poly_gen -# -- Compiling architecture nonsynth of poly_gen -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package qlaser_dac_dc_pkg -# -- Loading package qlaser_pkg -# -- Loading entity qlaser_dacs_pulse_channel -# -- Compiling entity tb_cpubus_dacs_pulse_channel -# -- Compiling architecture behave of tb_cpubus_dacs_pulse_channel -# -- Loading package std_logic_textio -# -- Compiling entity tb_pulse_channel_random_polynomials -# -- Compiling architecture verify of tb_pulse_channel_random_polynomials -# End time: 02:25:53 on Mar 05,2024, Elapsed time: 0:00:00 -# Errors: 0, Warnings: 0 -# End time: 02:25:55 on Mar 05,2024, Elapsed time: 0:01:40 -# Errors: 0, Warnings: 118 -# vsim -voptargs=""+acc"" -lib work tb_pulse_channel_random_polynomials -# Start time: 02:25:55 on Mar 05,2024 -# Loading std.standard -# Loading std.textio(body) -# Loading ieee.std_logic_1164(body) -# Loading ieee.numeric_std(body) -# Loading ieee.std_logic_textio(body) -# Loading ieee.math_real(body) -# Loading work.std_iopak(body) -# Loading work.qlaser_dacs_pulse_channel_pkg -# Loading work.qlaser_dac_dc_pkg -# Loading work.qlaser_pkg(body) -# Loading work.tb_pulse_channel_random_polynomials(verify) -# Loading work.qlaser_dacs_pulse_channel(channel) -# Loading work.bram_pulse_definition(structure) -# Loading unisim.gnd(gnd_v) -# Loading ieee.vital_timing(body) -# Loading ieee.vital_primitives(body) -# Loading unisim.vpkg(body) -# Loading unisim.ramb36e2(ramb36e2_v) -# Loading work.bram_waveform(structure) -# ** Warning: Design size of 19437 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity. -# Expect performance to be adversely affected. -# .main_pane.wave.interior.cs.body.pw.wf -# .main_pane.structure.interior.cs.body.struct -# .main_pane.objects.interior.cs.body.tree -# Simulation start -# Simulation done -write format wave -window .main_pane.wave.interior.cs.body.pw.wf E:/github/PulseChannel/tools/sim/waves_do/pp_polyrandom.do diff --git a/tools/sim/wave_values.txt b/tools/sim/wave_values.txt deleted file mode 100644 index f0f459c..0000000 --- a/tools/sim/wave_values.txt +++ /dev/null @@ -1,4096 +0,0 @@ -0.000000e+00 --0.000000e+00 -0.000000e+00 -2.997817e-01 -6.006957e-01 -9.027420e-01 -1.205921e+00 -1.510232e+00 -1.815675e+00 -2.122251e+00 -2.429959e+00 -2.738799e+00 -3.048772e+00 -3.359877e+00 -3.672115e+00 -3.985484e+00 -4.299986e+00 -4.615621e+00 -4.932388e+00 -5.250287e+00 -5.569318e+00 -5.889482e+00 -6.210778e+00 -6.533207e+00 -6.856768e+00 -7.181461e+00 -7.507286e+00 -7.834244e+00 -8.162334e+00 -8.491557e+00 -8.821912e+00 -9.153399e+00 -9.486019e+00 -9.819771e+00 -1.015465e+01 -1.049067e+01 -1.082782e+01 -1.116610e+01 -1.150552e+01 -1.184606e+01 -1.218774e+01 -1.253055e+01 -1.287449e+01 -1.321957e+01 -1.356578e+01 -1.391312e+01 -1.426159e+01 -1.461119e+01 -1.496193e+01 -1.531380e+01 -1.566680e+01 -1.602094e+01 -1.637620e+01 -1.673260e+01 -1.709013e+01 -1.744880e+01 -1.780859e+01 -1.816952e+01 -1.853158e+01 -1.889477e+01 -1.925910e+01 -1.962456e+01 -1.999115e+01 -2.035887e+01 -2.072772e+01 -2.109771e+01 -2.146883e+01 -2.184108e+01 -2.221446e+01 -2.258898e+01 -2.296463e+01 -2.334141e+01 -2.371932e+01 -2.409837e+01 -2.447855e+01 -2.485986e+01 -2.524230e+01 -2.562587e+01 -2.601058e+01 -2.639642e+01 -2.678339e+01 -2.717150e+01 -2.756073e+01 -2.795110e+01 -2.834261e+01 -2.873524e+01 -2.912900e+01 -2.952390e+01 -2.991993e+01 -3.031710e+01 -3.071539e+01 -3.111482e+01 -3.151538e+01 -3.191707e+01 -3.231990e+01 -3.272385e+01 -3.312894e+01 -3.353517e+01 -3.394252e+01 -3.435101e+01 -3.476063e+01 -3.517138e+01 -3.558326e+01 -3.599628e+01 -3.641042e+01 -3.682571e+01 -3.724212e+01 -3.765966e+01 -3.807834e+01 -3.849815e+01 -3.891909e+01 -3.934117e+01 -3.976437e+01 -4.018871e+01 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-1.023906e+04 -1.024512e+04 -1.025118e+04 -1.025724e+04 -1.026331e+04 -1.026937e+04 diff --git a/tools/sim/waves_do/pp_polyrandom.do b/tools/sim/waves_do/pp_polyrandom.do index 428d3e3..e250bd5 100644 --- a/tools/sim/waves_do/pp_polyrandom.do +++ b/tools/sim/waves_do/pp_polyrandom.do @@ -1,12 +1,13 @@ onerror {resume} quietly WaveActivateNextPane {} 0 +add wave -noupdate /tb_pulse_channel_random_polynomials/clk add wave -noupdate /tb_pulse_channel_random_polynomials/degrees add wave -noupdate /tb_pulse_channel_random_polynomials/times add wave -noupdate /tb_pulse_channel_random_polynomials/direction -add wave -noupdate -clampanalog 1 -format Analog-Backstep -max 10300.0 -radix decimal /tb_pulse_channel_random_polynomials/wave_values +add wave -noupdate -format Analog-Backstep -height 100 -max 10280.0 -radix decimal /tb_pulse_channel_random_polynomials/wave_values add wave -noupdate /tb_pulse_channel_random_polynomials/wave_values_next TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {42167186887 fs} 0} +WaveRestoreCursors {{Cursor 1} {20865000000 fs} 0} quietly wave cursor active 1 configure wave -namecolwidth 150 configure wave -valuecolwidth 100 diff --git a/tools/sim/work/_info b/tools/sim/work/_info deleted file mode 100644 index 50e61ff..0000000 --- a/tools/sim/work/_info +++ /dev/null @@ -1,1590 +0,0 @@ -m255 -K4 -z2 -13 -!s112 1.1 -!i10d 8192 -!i10e 25 -!i10f 100 -cModel Technology -Z0 dE:/github/PulseChannel/tools/sim -EsMlsj2YTrVrQ30VUXC9A9zggxemV1ljAH5S0yYSaPtBglVtxRJuD2i4SIQwdr2VKgL2efdu8Wg/T09hZsgpnhg== -Z1 w1708918545 -Z2 DPx4 ieee 11 numeric_std 0 22 :ASDNFgHXf_ih3J@9F3Ze1 -Z3 DPx6 unisim 11 vcomponents 0 22 LBCWZ3`cMODZ;DmGj4eXY2 -Z4 DPx3 std 6 textio 0 22 zE1`LPoLg^DX3Oz^4Fj1K3 -Z5 DPx4 ieee 14 std_logic_1164 0 22 eNV`TJ_GofJTzYa?f<@Oe1 -R0 -Z6 8../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl -Z7 F../../src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl -l0 -L755 -Vg?Uga`^ZD2_e]GUW0eTDU1 -!s100 hWaO9A@e2YolCE9W[fhko0 -Z8 OV;C;10.5b;63 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