74 lines
5.7 KiB
Plaintext
74 lines
5.7 KiB
Plaintext
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## 300MHz Clock from USER_SI570
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set_property PACKAGE_PIN AL7 [get_ports "p_clk_n"] ;# Bank 64 VCCO - VCC1V2 - IO_L12N_T1U_N11_GC_64
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set_property IOSTANDARD DIFF_SSTL12 [get_ports "p_clk_n"] ;# Bank 64 VCCO - VCC1V2 - IO_L12N_T1U_N11_GC_64
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set_property PACKAGE_PIN AL8 [get_ports "p_clk_p"] ;# Bank 64 VCCO - VCC1V2 - IO_L12P_T1U_N10_GC_64
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set_property IOSTANDARD DIFF_SSTL12 [get_ports "p_clk_p"] ;# Bank 64 VCCO - VCC1V2 - IO_L12P_T1U_N10_GC_64
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## Buttons SW_C
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# set_property -dict {PACKAGE_PIN C17 IOSTANDARD LVCMOS33} [get_ports p_reset]
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set_property PACKAGE_PIN AG13 [get_ports "p_reset"] ;# Bank 44 VCCO - VCC3V3 - IO_L10N_AD2N_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_reset"] ;# Bank 44 VCCO - VCC3V3 - IO_L10N_AD2N_44
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## LEDs
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set_property PACKAGE_PIN AG14 [get_ports "p_leds_0"] ;# Bank 44 VCCO - VCC3V3 - IO_L10P_AD2P_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_leds_0"] ;# Bank 44 VCCO - VCC3V3 - IO_L10P_AD2P_44
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set_property PACKAGE_PIN AF13 [get_ports "p_leds_1"] ;# Bank 44 VCCO - VCC3V3 - IO_L9N_AD3N_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_leds_1"] ;# Bank 44 VCCO - VCC3V3 - IO_L9N_AD3N_44
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set_property PACKAGE_PIN AE13 [get_ports "p_leds_2"] ;# Bank 44 VCCO - VCC3V3 - IO_L9P_AD3P_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_leds_2"] ;# Bank 44 VCCO - VCC3V3 - IO_L9P_AD3P_44
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set_property PACKAGE_PIN AJ14 [get_ports "p_leds_3"] ;# Bank 44 VCCO - VCC3V3 - IO_L8N_HDGC_AD4N_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_leds_3"] ;# Bank 44 VCCO - VCC3V3 - IO_L8N_HDGC_AD4N_44
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set_property PACKAGE_PIN AJ15 [get_ports "p_leds_4"] ;# Bank 44 VCCO - VCC3V3 - IO_L8P_HDGC_AD4P_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_leds_4"] ;# Bank 44 VCCO - VCC3V3 - IO_L8P_HDGC_AD4P_44
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set_property PACKAGE_PIN AH13 [get_ports "p_leds_5"] ;# Bank 44 VCCO - VCC3V3 - IO_L7N_HDGC_AD5N_44
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set_property IOSTANDARD LVCMOS33 [get_ports "p_leds_5"] ;# Bank 44 VCCO - VCC3V3 - IO_L8P_HDGC_AD4P_44
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# set_property -dict {PACKAGE_PIN A17 IOSTANDARD LVCMOS33} [get_ports {p_leds0_rgb[0]}]
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# set_property -dict {PACKAGE_PIN B16 IOSTANDARD LVCMOS33} [get_ports {p_leds0_rgb[1]}]
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# set_property -dict {PACKAGE_PIN B17 IOSTANDARD LVCMOS33} [get_ports {p_leds0_rgb[2]}]
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# set_property -dict {PACKAGE_PIN A16 IOSTANDARD LVCMOS33} [get_ports {p_leds1_rgb[0]}]
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# set_property -dict {PACKAGE_PIN A18 IOSTANDARD LVCMOS33} [get_ports {p_leds1_rgb[1]}]
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# set_property -dict {PACKAGE_PIN A19 IOSTANDARD LVCMOS33} [get_ports {p_leds1_rgb[2]}]
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## Pmod Header J55
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set_property PACKAGE_PIN A20 [get_ports "p_dc0_cs_n"] ;# Bank 47 VCCO - VCC3V3 - IO_L12N_AD0N_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc0_cs_n"] ;# Bank 47 VCCO - VCC3V3 - IO_L12N_AD0N_47
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set_property PACKAGE_PIN B20 [get_ports "p_dc0_mosi"] ;# Bank 47 VCCO - VCC3V3 - IO_L12P_AD0P_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc0_mosi"] ;# Bank 47 VCCO - VCC3V3 - IO_L12P_AD0P_47
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# set_property PACKAGE_PIN A22 [get_ports "p_dc0_nc"] ;# Bank 47 VCCO - VCC3V3 - IO_L11N_AD1N_47
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# set_property IOSTANDARD LVCMOS33 [get_ports "p_dc0_nc"] ;# Bank 47 VCCO - VCC3V3 - IO_L11N_AD1N_47
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set_property PACKAGE_PIN A21 [get_ports "p_dc0_sclk"] ;# Bank 47 VCCO - VCC3V3 - IO_L11P_AD1P_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc0_sclk"] ;# Bank 47 VCCO - VCC3V3 - IO_L11P_AD1P_47
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set_property PACKAGE_PIN B21 [get_ports "p_dc1_cs_n"] ;# Bank 47 VCCO - VCC3V3 - IO_L10N_AD2N_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc1_cs_n"] ;# Bank 47 VCCO - VCC3V3 - IO_L10N_AD2N_47
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set_property PACKAGE_PIN C21 [get_ports "p_dc1_mosi"] ;# Bank 47 VCCO - VCC3V3 - IO_L10P_AD2P_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc1_mosi"] ;# Bank 47 VCCO - VCC3V3 - IO_L10P_AD2P_47
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# set_property PACKAGE_PIN C22 [get_ports "p_dc1_nc"] ;# Bank 47 VCCO - VCC3V3 - IO_L9N_AD3N_47
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# set_property IOSTANDARD LVCMOS33 [get_ports "p_dc1_nc"] ;# Bank 47 VCCO - VCC3V3 - IO_L9N_AD3N_47
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set_property PACKAGE_PIN D21 [get_ports "p_dc1_sclk"] ;# Bank 47 VCCO - VCC3V3 - IO_L9P_AD3P_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc1_sclk"] ;# Bank 47 VCCO - VCC3V3 - IO_L9P_AD3P_47
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## Pmod Header J87
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set_property PACKAGE_PIN D20 [get_ports "p_dc2_cs_n"] ;# Bank 47 VCCO - VCC3V3 - IO_L8N_HDGC_AD4N_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc2_cs_n"] ;# Bank 47 VCCO - VCC3V3 - IO_L8N_HDGC_AD4N_47
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set_property PACKAGE_PIN E20 [get_ports "p_dc2_mosi"] ;# Bank 47 VCCO - VCC3V3 - IO_L8P_HDGC_AD4P_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc2_mosi"] ;# Bank 47 VCCO - VCC3V3 - IO_L8P_HDGC_AD4P_47
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set_property PACKAGE_PIN E22 [get_ports "p_dc2_sclk"] ;# Bank 47 VCCO - VCC3V3 - IO_L7N_HDGC_AD5N_47
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set_property IOSTANDARD LVCMOS33 [get_ports "p_dc2_sclk"] ;# Bank 47 VCCO - VCC3V3 - IO_L7N_HDGC_AD5N_47
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# UART
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set_property PACKAGE_PIN E13 [get_ports "p_serial_rxd"] ;# Bank 49 VCCO - VCC3V3 - IO_L12N_AD8N_49
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set_property IOSTANDARD LVCMOS33 [get_ports "p_serial_rxd"] ;# Bank 49 VCCO - VCC3V3 - IO_L12N_AD8N_49
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set_property PACKAGE_PIN F13 [get_ports "p_serial_txd"] ;# Bank 49 VCCO - VCC3V3 - IO_L12P_AD8P_49
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set_property IOSTANDARD LVCMOS33 [get_ports "p_serial_txd"] ;# Bank 49 VCCO - VCC3V3 - IO_L12P_AD8P_49
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# UART Debug (unsure, maybe just indicator LEDs?)
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set_property PACKAGE_PIN D12 [get_ports "p_debug_out[0]"] ;# Bank 49 VCCO - VCC3V3 - IO_L11N_AD9N_49
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set_property IOSTANDARD LVCMOS33 [get_ports "p_debug_out[0]"] ;# Bank 49 VCCO - VCC3V3 - IO_L11N_AD9N_49
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set_property PACKAGE_PIN E12 [get_ports "p_debug_out[1]"] ;# Bank 49 VCCO - VCC3V3 - IO_L11P_AD9P_49
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set_property IOSTANDARD LVCMOS33 [get_ports "p_debug_out[1]"] ;# Bank 49 VCCO - VCC3V3 - IO_L11P_AD9P_49
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