diff --git a/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl b/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl
index 5fb51a2..728ec65 100644
--- a/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl
+++ b/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl
@@ -368,9 +368,9 @@ begin
             v_pulsetime := v_ndata32 + (NADDR*(1024+32));
             v_timefactor := 1.0;
             v_gainfactor := 2.0;
-            v_wavestartaddr := 0;
-            v_wavesteps := (NADDR+1)*32;
-            v_wavetopwidth := 0;  -- TODO: EricToGeoff/Sara: in the real settings do we have a case of no flat top?
+            v_wavestartaddr := NADDR + v_wavesteps;  -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right?
+            v_wavesteps := 1;
+            v_wavetopwidth := 0; 
             -- cpu_write_pulsedef(clk, NADDR*4, v_ndata32 + (NADDR*(1024+32)), 1.0, 1.0, 0, NADDR*32, 128, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
             cpu_write_pulsedef(clk, NADDR*4, v_pulsetime, v_timefactor, v_gainfactor, v_wavestartaddr, v_wavesteps, v_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
         end loop;