simplified tb

This commit is contained in:
Eric Yu 2024-01-29 01:03:09 -08:00
parent 26775a0d2b
commit e41460c843
8 changed files with 6495 additions and 6467 deletions

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -18,6 +18,7 @@ port (
cnt_time : in std_logic_vector(23 downto 0); -- Time since trigger. cnt_time : in std_logic_vector(23 downto 0); -- Time since trigger.
busy : out std_logic; -- Status signal busy : out std_logic; -- Status signal
-- TODO: Add another status signal to indicate any errors?
-- CPU interface -- CPU interface
cpu_addr : in std_logic_vector(11 downto 0); -- Address input cpu_addr : in std_logic_vector(11 downto 0); -- Address input

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@ -328,6 +328,8 @@ begin
variable v_ndata16 : integer := 0; variable v_ndata16 : integer := 0;
-- "global" variables for base definitions of each pulses, all pulses are based on these but scaled/offset a bit -- "global" variables for base definitions of each pulses, all pulses are based on these but scaled/offset a bit
variable v_pulseaddr : integer := 0; -- manually set the pulse address, 0 to 255
variable v_waveaddr : integer := 0; -- manually set the wave address, 0 to 2047
variable v_pulsetime : integer := 0; -- For 24-bit pulse time variable v_pulsetime : integer := 0; -- For 24-bit pulse time
variable v_timefactor : real := 0.0; -- For 16-bit fixed point timestep variable v_timefactor : real := 0.0; -- For 16-bit fixed point timestep
variable v_gainfactor : real := 0.0; -- For 16-bit fixed point gain variable v_gainfactor : real := 0.0; -- For 16-bit fixed point gain
@ -363,17 +365,41 @@ begin
---------------------------------------------------------------- ----------------------------------------------------------------
v_ndata32 := 128; -- Time for first pulse v_ndata32 := 128; -- Time for first pulse
cpu_print_msg("Load pulse RAM"); cpu_print_msg("Load pulse RAM");
for NADDR in 0 to 255 loop -- for NADDR in 0 to 255 loop
-- TODO: In the real setting should we have the python script to check those parameters to make sure they are valid and non-overlapping? -- -- TODO: In the real setting should we have the python script to check those parameters to make sure they are valid and non-overlapping?
v_pulsetime := v_ndata32 + (NADDR*(1024+32)); -- v_pulsetime := v_ndata32 + (NADDR*(1024+32)); -- todo: what is this math doing?
v_timefactor := 1.0; -- v_timefactor := 1.0;
v_gainfactor := 1.0/real(NADDR + 1); -- v_gainfactor := 1.0/real(NADDR + 1);
v_wavestartaddr := 0; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right? -- v_wavestartaddr := 0; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right?
v_wavesteps := NADDR*32; -- v_wavesteps := NADDR*32;
v_wavetopwidth := NADDR; -- v_wavetopwidth := NADDR;
-- cpu_write_pulsedef(clk, NADDR*4, v_ndata32 + (NADDR*(1024+32)), 1.0, 1.0, 0, NADDR*32, 128, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); -- -- cpu_write_pulsedef(clk, NADDR*4, v_ndata32 + (NADDR*(1024+32)), 1.0, 1.0, 0, NADDR*32, 128, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
cpu_write_pulsedef(clk, NADDR*4, v_pulsetime, v_timefactor, v_gainfactor, v_wavestartaddr, v_wavesteps, v_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); -- cpu_write_pulsedef(clk, NADDR*4, v_pulsetime, v_timefactor, v_gainfactor, v_wavestartaddr, v_wavesteps, v_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
end loop; -- end loop;
----------------------------------------------------------------
-- Load pulse RAM with a series of pulse start times MANUALLY
---------------------------------------------------------------
v_pulseaddr := 1;
v_pulsetime := 7;
v_timefactor := 1.0;
v_gainfactor := 1.0;
v_wavestartaddr := 1; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right?
v_wavesteps := 4;
v_wavetopwidth := 1;
cpu_write_pulsedef(clk, v_pulseaddr*4, v_pulsetime, v_timefactor, v_gainfactor, v_wavestartaddr, v_wavesteps, v_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
v_pulseaddr := 32;
v_pulsetime := 21;
v_timefactor := 1.0;
v_gainfactor := 1.0;
v_wavestartaddr := 4; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right?
v_wavesteps := 6;
v_wavetopwidth := 9;
cpu_write_pulsedef(clk, v_pulseaddr*4, v_pulsetime, v_timefactor, v_gainfactor, v_wavestartaddr, v_wavesteps, v_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
cpu_print_msg("Pulse RAM loaded"); cpu_print_msg("Pulse RAM loaded");
clk_delay(20); clk_delay(20);
@ -388,8 +414,7 @@ begin
cpu_write(clk, (ADR_RAM_WAVE + NADDR) , v_ndata32, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); cpu_write(clk, (ADR_RAM_WAVE + NADDR) , v_ndata32, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
v_ndata16 := v_ndata16 + 2; v_ndata16 := v_ndata16 + 2;
end loop; end loop;
cpu_print_msg("Waveform RAM loaded");
clk_delay(20);
-- ---------------------------------------------------------------- -- ----------------------------------------------------------------
-- -- Read back Pulse RAM. -- -- Read back Pulse RAM.
@ -430,6 +455,7 @@ begin
clk_delay(5); clk_delay(5);
start <= '0'; start <= '0';
-- TODO: we may need to modify the for loop to make sure the simulation time is long enough to cover all the pulses
-- Wait for cnt_time to reach last pulse start time + waveform size -- Wait for cnt_time to reach last pulse start time + waveform size
for NCNT in 1 to (128 + 256*(1024+32)+ 4096) loop -- TODO: EricToGeoff/Sara: in the real settings do we have a constant amount of time or the total time also vary? if so, how much? for NCNT in 1 to (128 + 256*(1024+32)+ 4096) loop -- TODO: EricToGeoff/Sara: in the real settings do we have a constant amount of time or the total time also vary? if so, how much?
cnt_time <= std_logic_vector(unsigned(cnt_time) + 1); cnt_time <= std_logic_vector(unsigned(cnt_time) + 1);

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@ -1,2 +1,2 @@
echo off echo off
modelsim -c -quiet -do compile.do vsim -c -quiet -do compile.do

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@ -3,6 +3,7 @@ quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_
quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_time(15 downto 0)} reg_pulse_time_15_0 quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_time(15 downto 0)} reg_pulse_time_15_0
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/clk add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/clk
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/start
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reset add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reset
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/busy add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/busy
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/cnt_time add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/cnt_time
@ -21,11 +22,11 @@ add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/pc
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_pulse_addrb add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_pulse_addrb
add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_pulse_doutb add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_pulse_doutb
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_time add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_time
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_flattop
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_wave_start_addr
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_wave_length
add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_scale_gain add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_scale_gain
add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_scale_time add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_scale_time
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_wave_start_addr
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_wave_length
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_flattop
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_wea add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_wea
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_addra add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_addra
add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_dina add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_dina
@ -39,7 +40,7 @@ add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tvalid
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tlast add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tlast
add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tready add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tready
TreeUpdate [SetDefaultTree] TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {2789695000000 fs} 0} WaveRestoreCursors {{Cursor 2} {62275000000 fs} 0}
quietly wave cursor active 1 quietly wave cursor active 1
configure wave -namecolwidth 163 configure wave -namecolwidth 163
configure wave -valuecolwidth 99 configure wave -valuecolwidth 99
@ -55,4 +56,4 @@ configure wave -griddelta 40
configure wave -timeline 0 configure wave -timeline 0
configure wave -timelineunits fs configure wave -timelineunits fs
update update
WaveRestoreZoom {2786977182418 fs} {2792819201950 fs} WaveRestoreZoom {61852729312 fs} {62817270688 fs}