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modified tb

This commit is contained in:
Eric Yu 2024-01-22 14:45:38 -08:00
parent fd185eafdf
commit cbd8ca6215
10 changed files with 6680 additions and 6679 deletions
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1566
src/hdl/ip_gen/bram_pulse_definition_sim_netlist.vhdl
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6750
src/hdl/ip_gen/bram_pulseposition_sim_netlist.vhdl
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2326
src/hdl/ip_gen/bram_waveform_sim_netlist.vhdl
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2696
src/hdl/ip_gen/fifo_data_to_stream_sim_netlist.vhdl
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7
src/hdl/modules/qlaser_dacs_pulse_channel.vhdl
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@ -413,6 +413,9 @@ begin
ram_waveform_addrb <= reg_pulse_sizes(C_BITS_ADDR_START - 1 downto 0); ram_waveform_addrb <= reg_pulse_sizes(C_BITS_ADDR_START - 1 downto 0);
-- reset the wave lenth counter -- reset the wave lenth counter
cnt_wave_len <= (others=>'0'); cnt_wave_len <= (others=>'0');
-- parse the scale factors from reg_pulse_factors register
v_time_factor := reg_pulse_factors(C_BITS_TIME_FACTOR - 1 downto 0);
v_amp_factor := reg_pulse_factors(31 downto 16);
elsif (cnt_time = X"FFFFFF") then elsif (cnt_time = X"FFFFFF") then
sm_state <= S_IDLE; sm_state <= S_IDLE;
end if; end if;
@ -424,9 +427,7 @@ begin
------------------------------------------------------------------------ ------------------------------------------------------------------------
when S_WAVE_UP => when S_WAVE_UP =>
-- Check if is end of rise of the waveform, and hold the address -- Check if is end of rise of the waveform, and hold the address
-- first, parse the scale factors from reg_pulse_factors register
v_time_factor := reg_pulse_factors(C_BITS_TIME_FACTOR - 1 downto 0);
v_amp_factor := reg_pulse_factors(C_BITS_GAIN_FACTOR + C_BITS_TIME_FACTOR - 1 downto C_BITS_TIME_FACTOR);
-- TODO: convert the numbers below to constaint. right now just make sure I'm not confused -- TODO: convert the numbers below to constaint. right now just make sure I'm not confused
if (cnt_wave_len = reg_pulse_sizes(25 downto 16)) then if (cnt_wave_len = reg_pulse_sizes(25 downto 16)) then
sm_state <= S_WAVE_FLAT; sm_state <= S_WAVE_FLAT;

6
src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl
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@ -146,7 +146,7 @@ begin
--etc, etc. --etc, etc.
-- 4 writes. (Address is an integer) -- 4 writes. (Address is an integer)
cpu_write(clk, ADR_RAM_PULSE+num_entry , x"00" & slv_pulsetime, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); cpu_write(clk, ADR_RAM_PULSE+num_entry , x"00" & slv_pulsetime, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
cpu_write(clk, ADR_RAM_PULSE+(num_entry+1) , "00" & x"00" & slv_wavesteps & slv_wavestartaddr, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); cpu_write(clk, ADR_RAM_PULSE+(num_entry+1) , "00" & x"0" & slv_wavesteps & x"0" & slv_wavestartaddr, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
cpu_write(clk, ADR_RAM_PULSE+(num_entry+2) , slv_gainfactor & slv_timefactor, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); cpu_write(clk, ADR_RAM_PULSE+(num_entry+2) , slv_gainfactor & slv_timefactor, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
cpu_write(clk, ADR_RAM_PULSE+(num_entry+3) , "0000000" & x"00" & slv_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); cpu_write(clk, ADR_RAM_PULSE+(num_entry+3) , "0000000" & x"00" & slv_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);
@ -367,8 +367,8 @@ begin
-- TODO: In the real setting should we have the python script to check those parameters to make sure they are valid and non-overlapping? -- TODO: In the real setting should we have the python script to check those parameters to make sure they are valid and non-overlapping?
v_pulsetime := v_ndata32 + (NADDR*(1024+32)); v_pulsetime := v_ndata32 + (NADDR*(1024+32));
v_timefactor := 1.0; v_timefactor := 1.0;
v_gainfactor := 2.0; v_gainfactor := 0.5;
v_wavestartaddr := NADDR + v_wavesteps; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right? v_wavestartaddr := 0; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right?
v_wavesteps := 1; v_wavesteps := 1;
v_wavetopwidth := 0; v_wavetopwidth := 0;
-- cpu_write_pulsedef(clk, NADDR*4, v_ndata32 + (NADDR*(1024+32)), 1.0, 1.0, 0, NADDR*32, 128, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); -- cpu_write_pulsedef(clk, NADDR*4, v_ndata32 + (NADDR*(1024+32)), 1.0, 1.0, 0, NADDR*32, 128, cpu_sel, cpu_wr, cpu_addr, cpu_wdata);

2
tools/xilinx-zcu/bram_pulse_definition/bram_pulse_definition.xci
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@ -257,7 +257,7 @@
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/bram_pulse_definition</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/bram_pulse_definition</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1.2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
</spirit:configurableElementValues> </spirit:configurableElementValues>
<spirit:vendorExtensions> <spirit:vendorExtensions>

2
tools/xilinx-zcu/bram_pulseposition/bram_pulseposition.xci
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@ -86,7 +86,7 @@
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/bram_pulseposition</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/bram_pulseposition</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1.2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
</spirit:configurableElementValues> </spirit:configurableElementValues>
<spirit:vendorExtensions> <spirit:vendorExtensions>

2
tools/xilinx-zcu/bram_waveform/bram_waveform.xci
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@ -257,7 +257,7 @@
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/bram_waveform</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/bram_waveform</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1.2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
</spirit:configurableElementValues> </spirit:configurableElementValues>
<spirit:vendorExtensions> <spirit:vendorExtensions>

2
tools/xilinx-zcu/fifo_data_to_stream/fifo_data_to_stream.xci
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@ -524,7 +524,7 @@
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/fifo_data_to_stream</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">../../../prj/zcu_pulse_channel.gen/sources_1/ip/fifo_data_to_stream</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2022.1.2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue> <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
</spirit:configurableElementValues> </spirit:configurableElementValues>
<spirit:vendorExtensions> <spirit:vendorExtensions>