From 5ecd4eaf5afd38384e80410a068c55cbdc0962c4 Mon Sep 17 00:00:00 2001 From: Eric Yu Date: Tue, 23 Jan 2024 21:12:52 -0800 Subject: [PATCH] modified tb --- .gitignore | 1 + .vscode/settings.json | 3 --- src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl | 6 +++--- tools/sim/compile.bat | 2 +- tools/sim/waves_do/pp_sm_wavetables.do | 10 +++------- 5 files changed, 8 insertions(+), 14 deletions(-) delete mode 100644 .vscode/settings.json diff --git a/.gitignore b/.gitignore index d821c6b..527b8e2 100644 --- a/.gitignore +++ b/.gitignore @@ -2,6 +2,7 @@ *.jou *.ini *.wlf +*.vstf wlft* work transcript diff --git a/.vscode/settings.json b/.vscode/settings.json deleted file mode 100644 index cd814dc..0000000 --- a/.vscode/settings.json +++ /dev/null @@ -1,3 +0,0 @@ -{ - "digital-ide.dont-show-again.propose.issue": true -} \ No newline at end of file diff --git a/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl b/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl index b8ede84..4356158 100644 --- a/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl +++ b/src/hdl/tb/tb_cpubus_dacs_pulse_channel.vhdl @@ -367,10 +367,10 @@ begin -- TODO: In the real setting should we have the python script to check those parameters to make sure they are valid and non-overlapping? v_pulsetime := v_ndata32 + (NADDR*(1024+32)); v_timefactor := 1.0; - v_gainfactor := 0.5; + v_gainfactor := 1.0/real(NADDR + 1); v_wavestartaddr := 0; -- TODO: EricToGeoff/Sara: I assume we want starting address of each wave to be different and non-overlapping, right? - v_wavesteps := NADDR + 1; - v_wavetopwidth := 1; + v_wavesteps := NADDR*32; + v_wavetopwidth := NADDR; -- cpu_write_pulsedef(clk, NADDR*4, v_ndata32 + (NADDR*(1024+32)), 1.0, 1.0, 0, NADDR*32, 128, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); cpu_write_pulsedef(clk, NADDR*4, v_pulsetime, v_timefactor, v_gainfactor, v_wavestartaddr, v_wavesteps, v_wavetopwidth, cpu_sel, cpu_wr, cpu_addr, cpu_wdata); end loop; diff --git a/tools/sim/compile.bat b/tools/sim/compile.bat index 90718fc..c6a436e 100644 --- a/tools/sim/compile.bat +++ b/tools/sim/compile.bat @@ -1,2 +1,2 @@ echo off -vsim -c -quiet -do compile.do \ No newline at end of file +modelsim -c -quiet -do compile.do \ No newline at end of file diff --git a/tools/sim/waves_do/pp_sm_wavetables.do b/tools/sim/waves_do/pp_sm_wavetables.do index bcbf1a8..a43ea6e 100644 --- a/tools/sim/waves_do/pp_sm_wavetables.do +++ b/tools/sim/waves_do/pp_sm_wavetables.do @@ -1,10 +1,6 @@ onerror {resume} quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_time(31 downto 16)} reg_pulse_time_31_16 quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_time(15 downto 0)} reg_pulse_time_15_0 -quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_factors(31 downto 16)} reg_pulse_factors_31_16 -quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_factors(15 downto 0)} ewg_pulse_factors_15_0 -quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_sizes(11 downto 0)} wave_start_addr -quietly virtual signal -install /tb_cpubus_dacs_pulse_channel/u_dac_pulse { /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reg_pulse_sizes(25 downto 16)} wave_length quietly WaveActivateNextPane {} 0 add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/clk add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/reset @@ -38,12 +34,12 @@ add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/ram_waveform_doutb add wave -noupdate -radix hexadecimal /tb_cpubus_dacs_pulse_channel/u_dac_pulse/sm_wavedata add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/sm_wavedata_dv -add wave -noupdate -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tdata +add wave -noupdate -format Analog-Step -height 74 -max 204.0 -radix unsigned /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tdata add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tvalid add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tlast add wave -noupdate /tb_cpubus_dacs_pulse_channel/u_dac_pulse/axis_tready TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {104895000000 fs} 0} +WaveRestoreCursors {{Cursor 1} {2789695000000 fs} 0} quietly wave cursor active 1 configure wave -namecolwidth 163 configure wave -valuecolwidth 99 @@ -59,4 +55,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits fs update -WaveRestoreZoom {104768451235 fs} {104941548765 fs} +WaveRestoreZoom {2786977182418 fs} {2792819201950 fs}