Pipline_Arm_CPU/tools/sim/Benchmarks/test06_BlBr.arm

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// Test of BL and BR instructions.
// Requires:
// BL, BR, ADDI & B instructions
// Expected results:
// X0 = 1
// X1 = 0
// X2 = 0 (anything else indicates an error)
// X3 = 1 (signifies program end was reached)
// X4 = 52
// X5 = 64
// X29 = 20
// X30 = 68
//ADDI: I-type, Reg[Rd] = Reg[Rn] + {'0, Imm12}
//OP Imm12 Rn Rd
//3322222222 221111111111 00000 00000
//1098765432 109876543210 98765 43210
//1001000100 Unsigned 0..31 0..31
//B: B-type, PC = PC + SignExtend({Imm26, 2'b00})
//OP Imm26
//332222 22222211111111110000000000
//109876 54321098765432109876543210
//000101 2's Comp Imm26
//BL: B-type, PC = PC + SignExtend({Imm26, 2'b00}), X30 = PC + 4 (load into pc - 4 for pipline?)
//OP Imm26
//332222 22222211111111110000000000
//109876 54321098765432109876543210
//100101 2's Comp Imm26
//BR: R-type, PC = Reg[Rd]
//OP Rm Shamt Rn Rd
//33222222222 21111 111111 00000 00000
//10987654321 09876 543210 98765 43210
//11010110000 0..31 000000 0..31 0..31
// MAIN:
1001000100_000000000001_11111_00000 // 0: ADDI X0, X31, #1 // X0 = 1
1001000100_000000000000_11111_00001 // 4: ADDI X1, X31, #0 // X1 = 0
1001000100_000000000000_11111_00010 // 8: ADDI X2, X31, #0 // X2 = 0
1001000100_000000000000_11111_00011 // 12: ADDI X3, X31, #0 // X3 = 0
100101_00000000000000000000000101 // 16: BL BL_FORWARDS (+5) // X30 = 20
// BL_BACKWARDS:
1001000100_000000110100_11111_00100 // 20: ADDI X4, X31, #52 // X4 = 52
11010110000_00000_000000_00000_00100 // 24: BR X4 (ALMOST_THERE)
1001000100_000000000000_11111_11111 // 28: ADDI X31, X31, #0 // Noop
// BR_ERROR (SHOULD NOT EVER EXECUTE):
1001000100_000000000001_11111_00010 // 32: ADDI X2, X31, #1 // X2 = 1 (Error flag)
// BL_FORWARDS:
1001000100_000000000000_11110_11101 // 36: ADDI X29, X30, #0 // X29 = 20
1001000100_000001000000_11111_00101 // 40: ADDI X5, X31, #64 // X5 = 64
100101_11111111111111111111111010 // 44: BL BL_BACKWARDS (-6) // X30 = 48
1001000100_000000000000_11111_11111 // 48: ADDI X31, X31, #0 // Noop
// ALMOST_THERE:
11010110000_00000_000000_00000_00101 // 52: BR X5 (END)
1001000100_000000000000_11111_11111 // 56: ADDI X31, X31, #0 // Noop
// BR_ERROR (SHOULD NOT EVER EXECUTE):
1001000100_000000000001_11111_00010 // 60: ADDI X2, X31, #1 // X2 = 1 (Error flag)
// END:
100101_00000000000000000000000010 // 64: BL FINAL (+2) // X30 = 68
1001000100_000000000000_11111_11111 // 68: ADDI X31, X31, #0 // Noop
// FINAL:
1001000100_000000000001_11111_00011 // 72: ADDI X3, X31, #1 // X3 = 1
000101_00000000000000000000000000 // 76: B HALT (0)
1001000100_000000000000_11111_11111 // 80: ADDI X31, X31, #0 // Noop
// BL/BR_ERROR (SHOULD NOT EVER EXECUTE):
1001000100_000000000001_11111_00010 // 84: ADDI X2, X31, #1 // X2 = 1 (Error flag)