16 lines
180 B
Plaintext
16 lines
180 B
Plaintext
|
vlib work
|
||
|
|
|
||
|
|
vlog ../../../src/hdl/*.sv
|
||
|
|
|
||
|
|
vsim -voptargs="+acc" -t 1ns -lib work CPU_pipelined_testbench
|
||
|
|
|
||
|
|
do ../waves/test6.do
|
||
|
|
|
||
|
|
view wave
|
||
|
|
view structure
|
||
|
|
view signals
|
||
|
|
|
||
|
|
run -all
|
||
|
|
|
||
|
|
# End
|